E981.10A52KC ELMOS Semiconductor, E981.10A52KC Datasheet - Page 9

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E981.10A52KC

Manufacturer Part Number
E981.10A52KC
Description
Interface - Specialized Basic I/O Link Transciever
Manufacturer
ELMOS Semiconductor
Datasheet

Specifications of E981.10A52KC

Rohs
yes
Product Type
Basic I/O Link Transceiver
Operating Supply Voltage
3.3 V
Supply Current
1.5 mA
Maximum Power Dissipation
900 mW
Maximum Operating Temperature
+ 100 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Minimum Operating Temperature
- 40 C
5 Functional Description
5.1 Power supply
VDDH is the main supply pin. Pin VDD_IO supplies the host interface and allows an adaptation to 3.3V or 5V host sup-
ply levels. Pin VREGO is the voltage regulator output and Pin VDD is 5V sense input and internal supply. An external 5V
supply can be applied at VDD, if the internal regulator is not intended to be used. In this case VREGO must be left open.
If the internal regulator is used, pin VDD has to be connected to the regulator output pin VREGO. If external com-
ponents must be supplied with the regulated 5V, the regulator current driving capability can be extended by an
external NPN transistor.
5.1.1 vDDH
VDDH is the main supply voltage for the IC.
5.1.2 vDD_iO
VDD_IO is the supply voltage for the IO-stages between the IC and the host. It can be at 3.3V or 5V level. If VDD_IO
is under VDD_IO_UV the transmitter is disabled.
5.1.3 vDD
Pin VDD supplies the internal blocks. The supply voltage VDD can be applied externally or generated by the inter-
nal 5V regulator. An external NPN boost transistor can be connected to pins VREGO (Base) and VDD (Emitter) in
order to supply external devices too. If the voltage regulator is used without external transistor, both pins have to
be connected. If VDD is lower than VDD_UV the transmitter is disabled.
5.1.4 Power up sequences
As the supply voltage VDDH is applied, an internal voltage generator supplies the bandgap reference with 5V. The
voltage regulator starts up and supplies the internal circuitry and optionally external circuits as well. The power on
reset circuit releases the digital logic.
The supply voltage VDD_IO must be present in order to supply the host interface and enable the transmitter.
If the internal voltage regulator is not used, an external 5V has to be applied at pin VDD. No sequence is mandatory
in order to apply VDD and VDD_IO.
Power supply
1. With internal voltage
regulator
2. With external supply
3. With external boost
transistor (collector to
VDDH)
ELMOS Semiconductor AG
Pin VREGO
Short to VDD
Open
Connected to base of npn
transistor
Data Sheet
9/19
Pin VDD
Short to VREGO
Connected to external
supply
Connected to emitter of
npn transistor
QM-No.: 25DS0007E.02 2010-06-16
Supply current for
external components
<20 mA
External supply
Depends on npn
transistor
E981.10

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