C8051F997-GUR Silicon Labs, C8051F997-GUR Datasheet - Page 45
C8051F997-GUR
Manufacturer Part Number
C8051F997-GUR
Description
8-bit Microcontrollers - MCU 8kB 14-CH CDC
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F997-GUR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
the solder mask and the metal pad is to be 60 µm minimum, all the way around
the pad.
should be used to assure good solder paste release.
specification for Small Body Components.
Dimension
C
E
X
Y
Figure 3.9. QSOP-24 Landing Diagram
Table 3.7. PCB Land Pattern
Rev. 1.1
5.20
0.30
1.50
MIN
C8051F99x-C8051F98x
0.635 BSC
MAX
5.30
0.40
1.60
45
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