MAX3107EVKIT+ Maxim Integrated, MAX3107EVKIT+ Datasheet - Page 36

• Manufacturer Part Number: MAX3107EVKIT+
• Description: UART Interface IC UART with integrated Oscillator
• Manufacturer: Maxim Integrated

Specifications of MAX3107EVKIT+

• Number Of Channels: 1
• Data Rate: 24 Mbps
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.71 V
• Supply Current: 4 mA

MAX3107
36
FIFOTrgLvl—FIFO Interrupt Trigger Level Register
TxFIFOLvl—Transmit FIFO Level Register
RxFIFOLvl—Receive FIFO Level Register
SPI/I
Bits 7–4: RxTrig[3:0]
These 4 bits allow definition of the receive FIFO threshold level at which an ISR[3] interrupt is generated. This can be
used to signal that the receive FIFO is nearing overflow or that a predefined number of FIFO locations are available for
being read out in one block.
The actual FIFO trigger level is 8 times RxTrig[7:4], hence, the selectable threshold granularity is eight.
Bits 3–0: TxTrig[3:0]
These 4 bits allow definition of the transmit FIFO threshold level at which the MAX3107 generates an ISR[4] interrupt.
This can be used to manage data flow to the transmit FIFO. For example, if the trigger level is defined near the bottom
of the TxFIFO, the host knows that a predefined number of FIFO locations are available for being written to in one block.
Alternatively, if the trigger level is set near the top of the FIFO, the host is warned when the transmit FIFO is nearing
overflow, if written to on a word-by-word basis.
The actual FIFO trigger level is 8 times TxTrig[3:0], hence, the selectable threshold granularity is eight.
Bits 7–0: TxFL[7:0]
The TxFIFOLvl register represents the current number of words in the transmit FIFO.
Bits 7–0: RxFL[7:0]
The RxFIFOLvl register represents the current number of words in the receive FIFO.
ADDRESS:
MODE:
ADDRESS:
MODE:
ADDRESS:
MODE:
RESET
RESET
RESET
NAME
NAME
NAME
BIT
BIT
BIT
2
C UART with 128-Word FIFOs
RxTrig3
RxFL7
TxFL7
7
1
7
0
7
0
0x10
R/W
0x11
R
0x12
R
RxTrig2
TxFL6
RxFL6
6
1
6
0
6
0
RxTrig1
RxFL5
TxFL5
5
1
5
0
5
0
RxTrig0
TxFL4
RxFL4
4
1
4
0
4
0
TxTrig3
RxFL3
TxFL3
3
1
3
0
3
0
TxTrig2
TxFL2
RxFL2
2
1
2
0
2
0
TxTrig1
RxFL1
TxFL1
1
1
1
0
1
0
Maxim Integrated
TxTrig0
TxFL0
RxFL0
0
1
0
0
0
0