PCA9555APW,118 NXP Semiconductors, PCA9555APW,118 Datasheet - Page 5

• Manufacturer Part Number: PCA9555APW,118
• Description: Interface - I/O Expanders 16b I2C BUS INTERUPT
• Manufacturer: NXP Semiconductors

Specifications of PCA9555APW,118

• Rohs: yes
• Maximum Operating Frequency: 100 kHz
• Operating Supply Voltage: 1.65 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-24
• Operating Current: 160 mA
• Output Current: 25 mA
• Power Dissipation: 200 mW
• Product Type: I/O Expanders
• Factory Pack Quantity: 2500

NXP Semiconductors
6. Functional description
Table 4.
[1]
PCA9555A
Product data sheet
B7
0
0
0
0
0
0
0
0
Undefined.
B6
0
0
0
0
0
0
0
0
Command byte
Pointer register bits
B5
0
0
0
0
0
0
0
0
6.2.1 Pointer register and command byte
6.1 Device address
6.2 Registers
B4
0
0
0
0
0
0
0
0
B3
Refer to
A2, A1 and A0 are the hardware address package pins and are held to either HIGH
(logic 1) or LOW (logic 0) to assign one of the eight possible slave addresses. The last bit
of the slave address (R/W) defines the operation (read or write) to be performed. A HIGH
(logic 1) selects a read operation, while a LOW (logic 0) selects a write operation.
Following the successful acknowledgement of the address byte, the bus master sends a
command byte, which is stored in the Pointer register in the PCA9555A. The lower
three bits of this data byte state the operation (read or write) and the internal registers
(Input, Output, Polarity Inversion, or Configuration) that will be affected. This register is
write only.
0
0
0
0
0
0
0
0
Fig 4.
Fig 5.
B2
0
0
0
0
1
1
1
1
Figure 1 “Block diagram of
PCA9555A device address
Pointer register bits
B1
0
0
1
1
0
0
1
1
B0
All information provided in this document is subject to legal disclaimers.
0
1
0
1
0
1
0
1
Low-voltage 16-bit I
Command byte
(hexadecimal)
Rev. 1 — 11 September 2012
00h
01h
02h
03h
04h
05h
06h
07h
B7
0
B6
1
fixed
PCA9555A”.
Configuration port 0
Configuration port 1
Register
Input port 0
Input port 1
Output port 0
Output port 1
Polarity Inversion port 0
Polarity Inversion port 1
slave address
B5
0
2
C-bus I/O port with interrupt and weak pull-up
B4
0
A2
B3
selectable
hardware
A1
B2
A0
B1
002aaf819
002aaf540
R/W
B0
read/write byte
read/write byte
read/write byte
read/write byte
Protocol
read byte
read byte
read/write byte
read/write byte
PCA9555A
© NXP B.V. 2012. All rights reserved.
0000 0000
0000 0000
1111 1111
1111 1111
Power-up
default
xxxx xxxx
xxxx xxxx
1111 1111
1111 1111
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