IS25LD020-JDLE-TR ISSI, IS25LD020-JDLE-TR Datasheet - Page 17
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IS25LD020-JDLE-TR
Manufacturer Part Number
IS25LD020-JDLE-TR
Description
Flash 2M 2.3-3.6V 100Mhz Serial Flash
Manufacturer
ISSI
Datasheet
1.IS25LD020-JKLE.pdf
(41 pages)
Specifications of IS25LD020-JDLE-TR
Rohs
yes
Data Bus Width
8 bit
Memory Type
Flash
Memory Size
2 Mbit
Architecture
Uniform
Timing Type
Synchronous
Interface Type
SPI
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.3 V
Maximum Operating Current
15 mA
Operating Temperature
- 40 C to + 105 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Organization
256 K x 8
DEVICE OPERATION (CONTINUED)
FAST_READ COMMAND (FAST READ DATA) OPERATION
The FAST_READ instruction is used to read memory data at
up to a 100 MHz clock.
The FAST_READ instruction code is followed by three
address bytes (A23 - A0) and a dummy byte (8 clocks),
transmitted via the SI line, with each bit latched-in during the
rising edge of SCK. Then the first data byte addressed is
shifted out on the SO line, with each bit shifted out at a
maximum frequency fCT, during the falling edge of SCK.
Figure 13. Fast Read Data Sequence
Integrated Silicon Solution, Inc.- www.issi.com
Rev. D
2/12/2013
SIO
SIO
The first byte addressed can be at any memory location. The
address is automatically incremented after each byte of data
is shifted out. When the highest address is reached, the
address counter will roll over to the 000000h address,
allowing the entire memory to be read with a single
FAST_READ instruction. The FAST_READ instruction is
terminated by driving CE# high (VIH).
IS25CD512/010
IS25LD020
17