S25FL204K0TMFI040 Spansion, S25FL204K0TMFI040 Datasheet - Page 20

• Manufacturer Part Number: S25FL204K0TMFI040
• Description: Flash 4Mb 3V 85MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL204K0TMFI040

• Rohs: yes
• Memory Type: NOR Flash
• Memory Size: 4 MB
• Interface Type: SPI
• Access Time: 5 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-8

8.8
20
Page Program (PP) (02h)
The Page Program command allows up to 256 bytes of data to be programmed at previously erased to all 1s
(FFh) memory locations. A Write Enable command must be executed before the device will accept the Page
Program command (Status Register bit WEL must equal 1). The command is initiated by driving the CS# pin
low then shifting the command code “02h” followed by a 24-bit address (A23-A0) and at least one data byte,
into the SI/IO0 pin. The CS# pin must be held low for the entire length of the command while data is being
sent to the device. The Page Program command sequence is shown in
If an entire 256 byte page is to be programmed, the last address byte (the 8 least significant address bits)
should be set to 0. If the last address byte is not zero, and the number of clocks exceed the remaining page
length, the addressing will wrap to the beginning of the page. In some cases, less than 256 bytes (a partial
page) can be programmed without having any effect on other bytes within the same page. One condition to
perform a partial page program is that the number of clocks can not exceed the remaining page length. If
more than 256 bytes are sent to the device the addressing will wrap to the beginning of the page and
overwrite previously sent data.
As with the write and erase commands, the CS# pin must be driven high after the eighth bit of the last byte
has been latched. If this is not done the Page Program command will not be executed. After CS# is driven
high, the self-timed Page Program command will commence for a time duration of t
Characteristics on page 31.
command may still be accessed for checking the status of the WIP bit. The WIP bit is a 1 during the Page
Program cycle and becomes a 0 when the cycle is finished and the device is ready to accept other commands
again. After the Page Program cycle has finished the Write Enable Latch (WEL) bit in the Status Register is
cleared to 0. The Page Program command will not be executed if the addressed page is protected by the
Block Protect (BP3, BP2, BP1, and BP0) bits (see
SI/IO0
SI/IO0
SCK
CS #
CS #
SCK
*=M SB
SO
SO
Mode3
Mode0
32 33
0
1
Instruction (3BH )
Dum m y Clocks
34
2
35
3
Figure 8.7 Fast Read Dual Output Command Sequence
While the Page Program cycle is in progress, the Read Status Register
36
4
D a t a
High Im pedance
37
5
38
6
39
S25FL204K
7
S h e e t
23
*
6
7
*
40
8
D ata out 1
SI/IO 0 switches from input to output
22
4
5
41
9
24-Bit Address
21
2
3
10
42
Table 7.1 on page
0
1
43 44
( P r e l i m i n a r y )
3
28 29
*
6
7
D ata out 2
2
4
5
45
1
30 31
3
2
46
0
0
1
47
13).
6
7
*
48
Figure
D ata out 3
S25FL204K_00_06 January 17, 2013
4
5
49
3
2
50
8.8.
0
1
51
PP
6
7
.
51
*
See AC
D ata out 4
4
5
53
3
2
54
0
1
55
6
7
*