S25FL204K0TMFI040 Spansion, S25FL204K0TMFI040 Datasheet - Page 18

• Manufacturer Part Number: S25FL204K0TMFI040
• Description: Flash 4Mb 3V 85MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL204K0TMFI040

• Rohs: yes
• Memory Type: NOR Flash
• Memory Size: 4 MB
• Interface Type: SPI
• Access Time: 5 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-8

8.5
8.6
18
Read Data (03h)
Fast Read (0Bh)
The Read Data command allows one more data bytes to be sequentially read from the memory. The
command is initiated by driving the CS# pin low and then shifting the instruction code “03h” followed by a
24-bit address (A23-A0) into the SI/IO0 pin. The code and address bits are latched on the rising edge of the
SCK pin. After the address is received, the data byte of the addressed memory location will be shifted out on
the SO pin at the falling edge of SCK with most significant bit (MSB) first. The address is automatically
incremented to the next higher address after each byte of data is shifted out allowing for a continuous stream
of data. This means that the entire memory can be accessed with a single command as long as the clock
continues. The command is completed by driving CS# high.
The Read Data command sequence is shown in
Erase, Program or Write cycle is in process (WIP=1) the command is ignored and will not have any effects on
the current cycle. The Read Data command allows clock rates from D.C. to a maximum of f
Characteristics on page 31.
The Fast Read command is similar to the Read Data command except that it can operate at higher frequency
than the traditional Read Data command.
adding eight “dummy” clocks after the 24-bit address as shown in
device’s internal circuits additional time for setting up the initial address. During the dummy clocks the data
value on the SI pin is a “don’t care”.
SI/IO0
SCK
*=M SB
CS #
SO
SI/IO0
CS #
SCK
SO
*= M SB
M o d e 3
M o d e 0
M o d e 3
M o d e 0
0
1
Instruction (03 H)
0
2
3
1
Figure 8.4 Write Status Register Command Sequence
4
In stru ctio n ( 0 1H )
2
D a t a
High Im pedance
Figure 8.5 Read Data Command Sequence
5
3
6
7
S25FL204K
4
S h e e t
See AC Characteristics on page 31.
23
*
8
High Im pedance
5
22
9
Figure
24 -Bit Address
21
6
10
( P r e l i m i n a r y )
7
3
8.5. If a Read Data command is issued while an
28 29
7
*
8
2
6
1
30
9
Figure
0
31
5
10
7
*
32
4
11
8.6. The dummy clocks allow the
6
S25FL204K_00_06 January 17, 2013
33
3
5
12
34
This is accomplished by
Data O ut 1
4
35
2
13
3
36
1
14
2
37
0
15
1
R
38
.
See AC
0
39
M o d e 3
M o d e 0
7
Data O ut 2