78Q2123R/F1 Maxim Integrated, 78Q2123R/F1 Datasheet - Page 14

• Manufacturer Part Number: 78Q2123R/F1
• Description: Ethernet ICs
• Manufacturer: Maxim Integrated

Specifications of 78Q2123R/F1

• Rohs: yes

78Q2123/78Q2133 Data Sheet
3 Register Description
The 78Q2123/78Q2133 implement 13 16-bit registers, which are accessible via the MDIO and MDC pins.
The supported registers are shown below in the following table. Attempts to read unsupported registers
will be ignored and the MDIO pin will not be enabled as an output, as per the IEEE 802.3 specification.
All of the registers except those that are unique to the 78Q2123/78Q2133 will respond to the broadcast
PHYAD value of ‘00000’. The registers specific to the 78Q2123/78Q2133 occupy address space
MR16-24.
Legend
14
Address
20-22
8-14
Type
15
16
17
18
19
23
24
WC
0
1
2
3
4
5
6
7
0/1
R
Description
Readable by management.
Writeable by management. Self
Clearing.
Default value upon power up or
reset.
MR20-22
Symbol
MR8-14
MR15
MR16
MR17
MR18
MR19
MR23
MR24
MR0
MR1
MR2
MR3
MR4
MR5
MR6
MR7
Name
Control
Status
PHY Identifier 1
PHY Identifier 2
Auto-Negotiation Advertisement
Auto-Negotiation Link Partner Ability
Auto-Negotiation Expansion
Not Implemented
Reserved
Not Implemented
Vendor Specific
Interrupt Control/Status Register
Diagnostic Register
Transceiver Control
Reserved
LED Configuration Register
MDI/MDIX Control Register
Type
RC
W
Description
Writeable by management.
Readable by management.
Cleared upon a read operation.
Default (Hex)
(00C0)
(01E1)
(3100)
(7849)
(0140)
4XXX
000E
7237
0000
0000
0000
0000
0000
0000
0000
0000
0010
DS_21x3_001
Rev. 1.6