KSZ8041TLI-S Micrel, KSZ8041TLI-S Datasheet - Page 54

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KSZ8041TLI-S

Manufacturer Part Number
KSZ8041TLI-S
Description
Ethernet ICs Physical Layer Transceiver 10/100BASE-FX (Lead Free)
Manufacturer
Micrel
Datasheet

Specifications of KSZ8041TLI-S

Rohs
yes
Product
Ethernet Transceivers
Package / Case
TQFP-48
Mounting Style
SMD/SMT
Micrel, Inc.
KSZ8041TL/FTL
Reset Circuit
The following reset circuit is recommended for powering up the KSZ8041TL/FTL if reset is triggered by the power supply.
3.3V
D1: 1N4148
D1
R 10K
KSZ8041TL/FTL
RST#
C 10uF
Figure 21. Recommended Reset Circuit
The following reset circuit is recommended for applications where reset is driven by another device (e.g., CPU or FPGA).
At power-on-reset, R, C and D1 provide the necessary ramp rise time to reset the KSZ8041TL/FTL device. The
RST_OUT_n from CPU/FPGA provides the warm reset after power up.
3.3V
R 10K
D1
KSZ8041TL/FTL
CPU/FPGA
RST#
RST_OUT_n
D2
C 10uF
D1, D2: 1N4148
Figure 22. Recommended Reset Circuit for Interfacing with CPU/FPGA Reset Output
April 2007
54
M9999-042707-1.1

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