1893Y-10LFT IDT, 1893Y-10LFT Datasheet - Page 144
1893Y-10LFT
Manufacturer Part Number
1893Y-10LFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893Y-10LFT.pdf
(152 pages)
Specifications of 1893Y-10LFT
Rohs
yes
Part # Aliases
ICS1893Y-10LFT
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10.5.18 Reset: Hardware Reset and Power-Down
ICS1893 Rev C 6/6/00
RESETn
TXCLK Valid
Power
Consumption
(AC only)
REF_IN
Table 10-25
periods consist of timings of signals on the following pins:
•
•
•
Figure 10-19
Table 10-25. Hardware Reset and Power-Down Timing
Figure 10-19.
Period
Time
REF_IN
RESETn
TXCLK
t1
t2
t3
ICS1893 Data Sheet - Release
RESETn Active to Device Isolation and Initialization
Minimum RESETn Pulse Width
RESETn Released to TXCLK Valid
lists the significant time periods for the hardware reset and power-down reset. The time
shows the timing diagram for the time periods.
Hardware Reset and Power-Down Timing Diagram
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
t1
Parameter
144
t2
Chapter 10 DC and AC Operating Conditions
t3
Condi-
tions
–
–
–
Min.
500
–
–
Typ.
60
40
35
Max.
500
–
–
June, 2000
Units
ms
ns
ns
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