5AGZME5H2F35C3N Altera Corporation, 5AGZME5H2F35C3N Datasheet - Page 13
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5AGZME5H2F35C3N
Manufacturer Part Number
5AGZME5H2F35C3N
Description
FPGA - Field Programmable Gate Array FPGA - Arria V GZ 15096 LABS 534 IOs
Manufacturer
Altera Corporation
Series
Arria V GZr
Datasheet
1.5AGXFB3H4F40C5N.pdf
(33 pages)
Specifications of 5AGZME5H2F35C3N
Rohs
yes
Number Of Logic Blocks
15096
Number Of I/os
534
Maximum Operating Frequency
800 MHz
Operating Supply Voltage
1.2 V to 1.8 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
FBGA-1152
Distributed Ram
33518 kbit
Minimum Operating Temperature
0 C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
5AGZME5H2F35C3N
Manufacturer:
ALTERA
Quantity:
3 000
AV-51001
2013.01.11
Arria V Device Overview
Package Plan
19
20
Table 13: Package Plan for Arria V ST Devices Preliminary
FPGA GPIO
HPS I/O
LVDS
PCIe Hard IP Block
FPGA Hard Memory Controller
HPS Hard Memory Controller
ARM Cortex-A9 MPCore Processor
The number of GPIOs does not include transceiver I/Os. In the Quartus II software, the number of user I/Os
includes transceiver I/Os.
For the number of LVDS channels in each package, refer to the
in Arria V Devices
Mem-
Code
ber
D3
D5
20
FPGA
GPIO
250
250
19
HPS I/O
210
210
chapter.
(31 mm)
F896
Resource
6 Gbps
12
12
XCVR
Transmitter
Gbps
Receiver
10
4
4
FPGA
GPIO
385
385
HPS I/O
210
210
(35 mm)
F1152
6 Gbps
18
18
High-Speed Differential I/O Interfaces and DPA
Dual-core
XCVR
540
210
120
136
D3
2
3
1
Gbps
10
8
8
Member Code
540
540
Arria V Device Overview
FPGA
GPIO
HPS I/O
210
210
(40 mm)
F1517
Dual-core
6 Gbps
Altera Corporation
540
210
120
136
D5
2
3
1
30
30
XCVR
Gbps
13
10
16
16