LFE2-6E-5F256I Lattice, LFE2-6E-5F256I Datasheet - Page 44

• Manufacturer Part Number: LFE2-6E-5F256I
• Description: FPGA - Field Programmable Gate Array 6K LUTs 190 I/O DSP 1.2V -5 I
• Manufacturer: Lattice

Specifications of LFE2-6E-5F256I

• Number Of I/os: 190
• Maximum Operating Frequency: 311 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• Package / Case: FPBGA-256
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 450

Lattice Semiconductor
Table 2-14. Supported Output Standards
Hot Socketing
LatticeECP2 devices have been carefully designed to ensure predictable behavior during power-up and power-
down. Power supplies can be sequenced in any order. During power-up and power-down sequences, the I/Os
remain in tri-state until the power supply voltage is high enough to ensure reliable operation. In addition, leakage
into I/O pins is controlled to within specified limits. This allows for easy integration with the rest of the system.
These capabilities make the LatticeECP2 ideal for many multiple power supply and hot-swap applications.
Single-ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVCMOS33, Open Drain
LVCMOS25, Open Drain
LVCMOS18, Open Drain
LVCMOS15, Open Drain
LVCMOS12, Open Drain
PCI33/PCIX†
HSTL18 Class I, II
HSTL15 Class I
SSTL3 Class I, II
SSTL2 Class I, II
SSTL18 Class I, II
Differential Interfaces
Differential SSTL3, Class I, II
Differential SSTL2, Class I, II
Differential SSTL18, Class I, II
Differential HSTL18, Class I, II
Differential HSTL15, Class I
LVDS
MLVDS
BLVDS
LVPECL
RSDS
1. Emulated with external resistors. For more detail, please see information regarding additional technical documentation at
the end of this data sheet.
1
1
1
1
Output Standard
4mA, 8mA, 12mA, 16mA, 20mA
4mA, 8mA, 12mA, 16mA, 20mA
4mA, 8mA, 12mA 16mA, 20mA
4mA, 8mA, 12mA 16mA, 20mA
4mA, 8mA, 12mA 16mA, 20mA
4mA, 8mA, 12mA, 16mA
4mA, 8mA, 12mA 16mA
4mA, 8mA
2mA, 6mA
4mA, 8mA
2mA, 6mA
2-41
Drive
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
LatticeECP2 Family Data Sheet
V
CCIO
3.3
3.3
2.5
1.8
1.5
1.2
3.3
1.8
1.5
3.3
2.5
3.3
2.5
1.8
1.8
1.5
2.5
2.5
2.5
3.3
2.5
1.8
—
—
—
—
—
(Nom.)
Architecture