M95040-RMC6TG STMicroelectronics, M95040-RMC6TG Datasheet - Page 22

• Manufacturer Part Number: M95040-RMC6TG
• Description: EEPROM 4 Kbit SPI BUS EE 10MHz CR 5ms
• Manufacturer: STMicroelectronics

Specifications of M95040-RMC6TG

• Product Category: EEPROM
• Rohs: yes

Instructions
6.5
22/44
Read from Memory Array (READ)
As shown in
to the device, Chip Select (S) is first driven low. The bits of the instruction byte and address
byte are then shifted in, on Serial Data Input (D). For the M95040, the most significant
address bit, A8, is incorporated as bit b3 of the instruction byte, as shown in
Instruction
at that address is shifted out, on Serial Data Output (Q).
If Chip Select (S) continues to be driven low, an internal bit-pointer is automatically
incremented at each clock cycle, and the corresponding data bit is shifted out.
When the highest address is reached, the address counter rolls over to zero, allowing the
Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a
single READ instruction.
The Read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle.
The first byte addressed can be any byte within any page.
The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.
Table 6.
Figure 11. Read from Memory Array (READ) sequence
1. Depending on the memory size, as shown in
Address Bits
S
C
D
Q
are Don’t Care.
Device
set. The address is loaded into an internal address register, and the byte of data
Figure 11: Read from Memory Array (READ)
Address range bits
0
1
High Impedance
2
Instruction
3
A8
4
Doc ID 6512 Rev 10
5
M95040
6
A8-A0
7
A7
Table 6: Address range
8
A6 A5 A4 A3 A2 A1 A0
9 10 11 12 13 14 15 16 17 18 19
Byte Address
M95020
A7-A0
sequence, to send this instruction
bits, the most significant address bits
M950x0 M950x0-W M950x0-R
7
6
5
Data Out
4
3
20 21 22
2
Table 4:
M95010
A6-A0
1
0
AI01440E