M95040-RMC6TG STMicroelectronics, M95040-RMC6TG Datasheet
M95040-RMC6TG
Specifications of M95040-RMC6TG
Related parts for M95040-RMC6TG
M95040-RMC6TG Summary of contents
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... More than 40-year data retention ■ Packages – RoHS-compliant and Halogen-free ® (ECOPACK2 ) Table 1. Device summary Reference M95040 M95040 M95040-W M95040-R M95020 M95020 M95020-W M95020-R M95010 M95010 M95010-W M95010-R February 2012 Part number Doc ID 6512 Rev 10 M950x0 M950x0-W M950x0-R with high-speed clock ...
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Contents Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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M950x0 M950x0-W M950x0-R 6.3.3 6.4 Write Status Register (WRSR ...
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List of tables List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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M950x0 M950x0-W M950x0-R List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Description 1 Description The M95040 Kbit (512 x 8) electrically erasable programmable memory (EEPROM), accessed by a high-speed SPI-compatible bus. The other members of the family (M95020 and M95010) are identical, though proportionally smaller (2 and 1 Kbit, respectively). Each device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q ...
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M950x0 M950x0-W M950x0-R Table 2. Signal names Signal name HOLD Function Serial Clock Serial Data input Serial Data output Chip Select Write Protect Hold Supply voltage Ground Doc ID 6512 Rev ...
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Signal description 2 Signal description During all operations (min (max All of the input and output signals can be held high or low (according to voltages specified ...
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M950x0 M950x0-W M950x0-R 2.6 Write Protect (W) This input signal is used to control whether the memory is write protected. When Write Protect (W) is held low, writes to the memory are disabled, but other operations remain enabled. Write Protect ...
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Signal description 2.9.3 Power-up conditions When the power supply is turned on, V time, the Chip Select (S) line is not allowed to float but should follow the V therefore recommended to connect the S line to V Figure 3: ...
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M950x0 M950x0-W M950x0-R 3 Connecting to the SPI bus The device is fully compatible with the SPI protocol. All instructions, addresses and input data bytes are shifted in to the device, most significant bit first. The Serial Data Input (D) ...
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Connecting to the SPI bus 3.1 SPI modes The device can be driven by a microcontroller with its SPI peripheral running in either of the two following modes: ● CPOL=0, CPHA=0 ● CPOL=1, CPHA=1 For these two modes, input data ...
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M950x0 M950x0-W M950x0-R 4 Operating features 4.1 Hold condition The Hold (HOLD) signal is used to pause any serial communications with the device without resetting the clocking sequence. During the Hold condition, the Serial Data Output (Q) is high impedance, ...
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... Write-protected block size Status register bits BP1 BP0 14/44 Protected array addresses Protected block M95040 none none Upper quarter 180h - 1FFh Upper half 100h - 1FFh Whole memory 000h - 1FFh Doc ID 6512 Rev 10 M950x0 M950x0-W M950x0-R M95020 M95010 none none ...
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... The memory is organized as shown in Figure 6. Block diagram HOLD W Control Logic Address Register and Counter Figure 6: Block diagram. High Voltage Generator I/O Shift Register Data Register 1 Page X Decoder Doc ID 6512 Rev 10 Memory organization Status Register Size of the Read only EEPROM area AI01272C 15/44 ...
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... WRSR READ WRITE Don’t Care for the upper half of the memory array of the M95040, and 0 for the lower half, and is Don’t Care for other devices. 6.1 Write Enable (WREN) The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. ...
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M950x0 M950x0-W M950x0-R 6.2 Write Disable (WRDI) One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown in Figure 8: Write Disable (WRDI) Chip Select (S) is driven ...
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Instructions 6.3 Read Status Register (RDSR) The Read Status Register instruction is used to read the Status Register. As shown in Figure The bits of the instruction byte are then shifted in, on Serial Data Input (D). The current state ...
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M950x0 M950x0-W M950x0-R Figure 9. Read Status Register (RDSR) sequence High Impedance Instruction Status Register Out ...
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Instructions 6.4 Write Status Register (WRSR) The Write Status Register (WRSR) instruction allows new values to be written to the Status register. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. The Write Status ...
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M950x0 M950x0-W M950x0-R The instruction is not accepted, and is not executed, under the following conditions: ● if the Write Enable Latch (WEL) bit has not been set to 1 (by executing a Write Enable instruction just before) ● if ...
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... Figure 11: Read from Memory Array (READ) to the device, Chip Select (S) is first driven low. The bits of the instruction byte and address byte are then shifted in, on Serial Data Input (D). For the M95040, the most significant address bit, A8, is incorporated as bit b3 of the instruction byte, as shown in Instruction set ...
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M950x0 M950x0-W M950x0-R 6.6 Write to Memory Array (WRITE) As shown in Figure 12: Byte Write (WRITE) Chip Select (S) is first driven low. The bits of the instruction byte, address byte, and at least one data byte are then ...
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Instructions Figure 13. Page Write (WRITE) sequence Depending on the memory size, as shown in are Don’t Care. 24/ ...
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M950x0 M950x0-W M950x0-R 7 Power-up and delivery states 7.1 Power-up state After Power-up, the device is in the following state: ● low power Standby Power mode ● deselected (after Power-up, a falling edge is required on Chip Select (S) before ...
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... These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the operating sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 7. ...
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M950x0 M950x0-W M950x0 and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristic tables that follow are derived from tests ...
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DC and AC parameters Figure 14. AC test measurement I/O waveform Table 12. Capacitance Symbol C Output capacitance (Q) OUT C Input capacitance (D) IN Input capacitance (other pins) 1. Sampled only, not 100% tested Table 13. DC ...
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M950x0 M950x0-W M950x0-R Table 14. DC characteristics (M950x0-W, device grade 6) Symbol Parameter I Input leakage current LI I Output leakage current LO I Supply current CC Supply current I CC1 (Standby Power mode) V Input low voltage IL V ...
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DC and AC parameters Table 15. DC characteristics (M950x0-W, device grade 3) Symbol I Input leakage current LI I Output leakage current LO I Supply current CC Supply current I CC1 (Standby Power mode) V Input low voltage IL V ...
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M950x0 M950x0-W M950x0-R Table 17. AC characteristics (M950x0, device grade 3) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ...
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DC and AC parameters Table 18. AC characteristics (M950x0-W, device grade 6) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( ...
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M950x0 M950x0-W M950x0-R Table 19. AC characteristics (M950x0-W, device grade 3) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ...
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DC and AC parameters Table 20. AC characteristics (M950x0-R, device grade 6) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( ...
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M950x0 M950x0-W M950x0-R Figure 15. Serial input timing S tCHSL C tDVCH D Q Figure 16. Hold timing HOLD tSLCH tCH tCHCL tCL tCHDX MSB IN High impedance tHLCH tCLHL tHLQZ Doc ID 6512 Rev 10 DC ...
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DC and AC parameters Figure 17. Serial output timing S C tCLQV tCLCH tCLQX Q ADDR D LSB IN 36/44 tCH tCHCL tCL tQLQH tQHQL Doc ID 6512 Rev 10 M950x0 M950x0-W M950x0-R tSHSL tSHQZ AI01449f ...
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M950x0 M950x0-W M950x0-R 10 Package mechanical data In order to meet environmental requirements, ST offers the device in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available ...
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Package mechanical data Figure 19. TSSOP8 — 8-lead thin shrink small outline, package outline Drawing is not to scale. Table 22. TSSOP8 — 8-lead thin shrink small outline, package mechanical data Symbol ...
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M950x0 M950x0-W M950x0-R Figure 20. UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, outline 1. Drawing is not to scale. 2. The central pad (the area the above illustration) ...
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... ST sales office for a copy. 2. Used only for device grade 3 For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. 40/44 (1) . ® (RoHS compliant) Doc ID 6512 Rev 10 M950x0 M950x0-W M950x0-R M95040 – ...
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M950x0 M950x0-W M950x0-R 12 Revision history Table 25. Document revision history Date Version 10-May-2000 16-Mar-2001 19-Jul-2001 11-Oct-2001 26-Feb-2002 27-Sep-2002 24-Oct-2002 24-Feb-2003 28-May-2003 25-Jun-2003 21-Nov-2003 02-Feb-2004 01-Mar-2004 05-Oct-2004 s/issuing three bytes/issuing two bytes/ in the 2nd sentence of the Byte 2.2 ...
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Revision history Table 25. Document revision history Date Version 06-Nov-2006 20-Mar-2008 42/44 Document converted to new template, moved to below Section 6.3: Read Status Register PDIP package removed. UFDFPN8 (MB) package added (see and Table 23) and SO8N package specifications ...
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... Figure 20: UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead 2 × 3mm, /W process option removed from ECOPACK text updated. Small text changes. Document renamed from “M95040 M95020 M95010” to “M950x0 M950x0-W M950x0-R” Silhouette of UDFPN8 (MB or MC) on the cover page updated. Section 6.3: Read Status Register (RDSR) Text modified in Section 6 ...
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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...