550CF30M2400DG Silicon Labs, 550CF30M2400DG Datasheet - Page 9
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550CF30M2400DG
Manufacturer Part Number
550CF30M2400DG
Description
VCXO Oscillators Sngl VCXO 6pin 7mm x 5mm
Manufacturer
Silicon Labs
Series
550r
Datasheet
1.550FH200M000DG.pdf
(14 pages)
Specifications of 550CF30M2400DG
Product Category
VCXO Oscillators
Rohs
yes
Package / Case
7 mm x 5 mm
Frequency
30.24 MHz
Frequency Stability
50 PPM
Supply Voltage
3.3 V
Termination Style
SMD/SMT
Dimensions
5 mm W x 7 mm L x 1.65 mm H
Minimum Operating Temperature
- 40 C
Maximum Operating Temperature
+ 85 C
Load Capacitance
15 pF
Mounting Style
SMD/SMT
Product
VCXO
Supply Voltage - Max
3.63 V
Supply Voltage - Min
2.97 V
3. Ordering Information
The Si550 supports a variety of options including frequency, temperature stability, tuning slope, output format, and
V
specified using the Part Number Configuration chart shown below. Silicon Labs provides a web browser-based part
number configuration utility to simplify this process. Refer to
and for further ordering instructions. The Si550 VCXO series is available in an industry-standard, RoHS compliant,
lead-free, 6-pad, 5 x 7 mm package. Tape and reel packaging is an ordering option.
DD
Example Part Number: 550AF622M080DGR is a 5 x 7 mm VCXO in a 6 pad package. The nominal frequency is 622.080 MHz, with a 3.3 V supply,
LVPECL output, and Output Enable active high polarity. Temperature stability is specified as ±50 ppm and the tuning slope is 135 ppm/V. The part
is specified for a –40 to +85 C° ambient temperature range operation and is shipped in tape and reel format.
A
B
C
D
E
F
G
H
J
K
M
N
P
Q
R
S
T
U
V
W
Note:
CMOS available to 160 MHz.
. Specific device configurations are programmed into the Si550 at time of shipment. Configurations are
V
3.3
3.3
3.3
3.3
2.5
2.5
2.5
2.5
1.8
1.8
3.3
3.3
3.3
3.3
2.5
2.5
2.5
2.5
1.8
1.8
DD
Output Format Output Enable Polarity
LVPECL
LVDS
CMOS
CML
LVPECL
LVDS
CMOS
CML
CMOS
CML
LVPECL
LVDS
CMOS
CML
LVPECL
LVDS
CMOS
CML
CMOS
CML
1
st
Option Code
Product Family
550 VCXO
550
High
High
High
High
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
X
Figure 1. Part Number Convention
X
Code
Notes:
1. For best jitter and phase noise performance, always choose the smallest Kv that meets
2. APR is the ability of a VCXO to track a signal over the product lifetime. A VCXO with an
3. Nominal Pull range (±) = 0.5 x V
4. Nominal Absolute Pull Range (±APR) = Pull range – stability – lifetime aging
5. Minimum APR values noted above include worst case values for all parameters.
6. Combination not available.
A
B
C
D
E
F
G
H
J
K
M
the application’s minimum APR requirements. Unlike SAW-based solutions which
require higher higher Kv values to account for their higher temperature dependence,
the Si55x series provides lower Kv options to minimize noise coupling and jitter in real-
world PLL designs. See AN255 and AN266 for more information.
APR of ±25 ppm is able to lock to a clock with a ±25 ppm stability over 15 years over all
operating conditions.
XXXMXXX
Temperature
± ppm (max)
Rev. 1.0
Stability
100
100
100
20
20
20
20
50
50
20
50
Available frequency range is 10 to 945 MHz, 970 to 1134, and 1213 to
1417 MHz. The position of “M” shifts to denote higher or lower
frequencies. If the frequency of interest requires greater than 6 digit
resolution, a six digit code will be assigned for the specific frequency.
www.silabs.com/VCXOPartNumber
Tuning Slope
ppm/V (typ)
180
135
180
180
135
356
356
Kv
90
90
45
33
D
Frequency (e.g. 622M080 is 622.080 MHz)
= 0.5 x V
DD
2
x tuning slope.
nd
Option Code
DD
G
x tuning slope – stability – 10 ppm
3.3 V
100
150
100
295
185
375
130
30
80
25
12
(±ppm) for VDD @
Minimum APR
Device Revision Letter
R
Note 6
Note 6
Note 6
Operating Temp Range (°C)
2.5 V
220
300
145
104
125
G
75
30
75
R = Tape & Reel
Blank = Trays
to access this tool
–40 to +85 °C
Note 6
Note 6
Note 6
1.8 V
155
105
235
25
75
25
50
70
Si550
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