MAX1178AEUP Maxim Integrated, MAX1178AEUP Datasheet - Page 7

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MAX1178AEUP

Manufacturer Part Number
MAX1178AEUP
Description
Analog to Digital Converters - ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1178AEUP

Number Of Channels
1
Architecture
SAR
Conversion Rate
135 KSPs
Resolution
16 bit
Input Type
Single-Ended
Snr
91 dB
Interface Type
Parallel
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Package / Case
TSSOP-20
Maximum Power Dissipation
879 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
4.096 V
The MAX1178/MAX1188 use a successive-approxima-
tion (SAR) conversion technique with an inherent track-
and-hold (T/H) stage to convert an analog input into a
16-bit digital output. Parallel outputs provide a high-
speed interface to microprocessors (µPs). The Func-
tional Diagram shows a simplified internal architecture of
the MAX1178/MAX1188. Figure 3 shows a typical oper-
ating circuit for the MAX1178/MAX1188.
Figure 1. Load Circuits
DO–D15
1mA
PIN
13
14
15
16
17
18
19
20
a) HIGH-Z TO V
DGND
V
V
OL
OH
TO V
TO HIGH-Z
16-Bit, 135ksps, Single-Supply ADCs with
D2/D10
D3/D11
NAME
DGND
D0/D8
D1/D9
HBEN
DV
OH
CS
_______________________________________________________________________________________
, AND
DD
OH
C
,
LOAD
Detailed Description
= 20pF
High-Byte Enable Input. Used to multiplex the 16-bit conversion result.
1: MSB available on the data bus.
0: LSB available on the data bus.
Convert Start. The first falling edge of CS powers up the device and enables acquire mode when R/C
is low. The second falling edge of CS starts conversion. The third falling edge of CS loads the result
onto the bus when R/C is high.
Digital Ground
Digital Supply Voltage. Bypass with a 0.1µF capacitor to DGND.
Tri-State Digital-Data Output. D0 is the LSB.
Tri-State Digital-Data Output
Tri-State Digital-Data Output
Tri-State Digital-Data Output
Converter Operation
DO–D15
b) HIGH-Z TO V
V
V
OH
OL
TO HIGH-Z
TO V
1mA
OL
DV
, AND
OL
DD
,
C
DGND
LOAD
= 20pF
Bipolar Analog Input Range
The MAX1178/MAX1188 have an input scaler, which
allows conversion of true bipolar input voltages and
input voltages greater than the power supply, while
operating from a single +5V analog supply. The input
scaler attenuates and shifts the analog input to match
the input range of the internal digital-to-analog converter
(DAC). The MAX1178 input voltage range is ±5V, while
the MAX1188 input voltage range is ±10V. Figure 4
shows the equivalent input circuit of the MAX1178/
MAX1188. This circuit limits the current going into or
out of AIN to less than 1.8mA.
In track mode, the internal hold capacitor acquires the
analog signal (Figure 4). In hold mode, the T/H switch-
es open and the capacitive DAC samples the analog
input. During the acquisition, the analog input (AIN)
charges capacitor C
second falling edge of CS. At this instant, the T/H
switches open. The retained charge on C
sents a sample of the input. In hold mode, the capaci-
tive DAC adjusts during the remainder of the conversion
time to restore node T/H OUT to zero within the limits of
16-bit resolution. Force CS low to put valid data on the
bus after conversion is complete.
FUNCTION
Pin Description (continued)
HOLD
. The acquisition ends on the
Track and Hold (T/H)
Analog Input
Input Scaler
HOLD
repre-
7

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