MAX1178AEUP Maxim Integrated, MAX1178AEUP Datasheet - Page 10

• Manufacturer Part Number: MAX1178AEUP
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1178AEUP

• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 135 KSPs
• Resolution: 16 bit
• Input Type: Single-Ended
• Snr: 91 dB
• Interface Type: Parallel
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TSSOP-20
• Maximum Power Dissipation: 879 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 4.096 V

An external reference can be placed at either the input
(REFADJ) or the output (REF) of the MAX1178/
MAX1188s’ internal buffer amplifier. Using the buffered
REFADJ input makes buffering the external reference
unnecessary. The input impedance of REFADJ is typi-
cally 5kΩ. The internal buffer output must be bypassed
at REF with a 10µF capacitor.
Connect REFADJ to AV
Directly drive REF using an external 3.8V to 4.2V refer-
ence. During conversion, the external reference must
be able to drive 100µA of DC load current and have an
output impedance of 10Ω or less.
For optimal performance, buffer the reference through
an op amp and bypass REF with a 10µF capacitor.
Consider the MAX1178/MAX1188s’ equivalent input
noise (0.6 LSB) when choosing a reference.
EOC is provided to flag the µP when a conversion is
complete. The falling edge of EOC signals that the data
is valid and ready to be output to the bus. D0–D15 are
the parallel outputs of the MAX1178/MAX1188. These
tri-state outputs allow for direct connection to a micro-
controller I/O bus. The outputs remain high impedance
during acquisition and conversion. Data is loaded onto
the output bus with the third falling edge of CS with R/C
high (after t
back to high impedance. The MAX1178/MAX1188 then
wait for the next falling edge of CS to start the next con-
version cycle (Figure 2).
HBEN toggles the output between the high/low byte. The
low byte is loaded onto the output bus when HBEN is
low, and the high byte is on the bus when HBEN is high.
16-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
10
Figure 7. MAX1178/MAX1188 Reference-Adjust Circuit
______________________________________________________________________________________
100kΩ
+5V
DO
150kΩ
). Bringing CS high forces the output bus
Reading the Conversion Result
68kΩ
DD
0.1µF
to disable the internal buffer.
External Reference
REFADJ
MAX1178
MAX1188
Figures 8 and 9 show the MAX1178/MAX1188 output
transfer functions. The MAX1178 and MAX1188 outputs
are coded in offset binary.
Most applications require an input buffer amplifier to
achieve 16-bit accuracy and prevent loading the
source. When the input signal is multiplexed, switch the
channels immediately after acquisition, rather than near
the end of, or after, a conversion. This allows more time
for the input buffer amplifier to respond to a large step
Figure 8. MAX1178 Transfer Function
Figure 9. MAX1188 Transfer Function
1111 1111 1111 1111
1111 1111 1111 1110
1111 1111 1111 1101
1000 0000 0000 0001
1000 0000 0000 0000
0001 1111 1111 1111
0000 0000 0000 0011
0000 0000 0000 0010
0000 0000 0000 0001
0000 0000 0000 0000
11 1111 1111 1111
11 1111 1111 1110
11 1111 1111 1101
10 0000 0000 0001
10 0000 0000 0000
01 1111 1111 1111
00 0000 0000 0011
00 0000 0000 0010
00 0000 0000 0001
00 0000 0000 0000
OUTPUT CODE
OUTPUT CODE
-32,768
-32,68
-32,767 -32,765
-32,767 -32,765
-32,766
-32,766
INPUT VOLTAGE (LSB)
INPUT VOLTAGE (LSB)
INPUT RANGE = -10V TO +10V
INPUT RANGE = -5V TO +5V
-1
-1
FULL-SCALE
TRANSITION
FULL-SCALE
TRANSITION
0
0
MAX1178
MAX1188
+1
Transfer Function
FULL-SCALE RANGE (FSR) = +20V
+1
FULL-SCALE RANGE (FSR) = +1V
1 LSB =
1 LSB =
+32,766
+32,766
Input Buffer
+32,767
+32,767
65,536 x 4.096
65,536 x 4.096
+32,768
+32,768
FSR x V
FSR x V
REF
REF