S9S12GN32F0VLC Freescale Semiconductor, S9S12GN32F0VLC Datasheet - Page 55

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S9S12GN32F0VLC

Manufacturer Part Number
S9S12GN32F0VLC
Description
16-bit Microcontrollers - MCU 16-bit32k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12GN32F0VLC

Product Category
16-bit Microcontrollers - MCU
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
32 KB
Data Ram Size
2048 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
1.7.2.11
PJ[7:0] are general-purpose input or output signals. The signals can be configured on per signal basis as
interrupt inputs with wakeup capability (KWJ[7:0]). They can have a pull-up or pull-down device selected
and enabled on per signal basis. Out of reset the pull devices are enabled .
1.7.2.12
PM[3:0] are general-purpose input or output signals. They can have a pull-up or pull-down device selected
and enabled on per signal basis. Out of reset the pull devices are disabled. The signals can be configured
on per pin basis to open-drain mode.
1.7.2.13
PP[7:0] are general-purpose input or output signals. The signals can be configured on per signal basis as
interrupt inputs with wakeup capability (KWP[7:0]). They can have a pull-up or pull-down device selected
and enabled on per signal basis. Out of reset the pull devices are disabled .
1.7.2.14
PS[7:0] are general-purpose input or output signals. They can have a pull-up or pull-down device selected
and enabled on per signal basis. Out of reset the pull-up devices are enabled. The signals can be configured
on per pin basis in open-drain mode.
1.7.2.15
PT[7:0] are general-purpose input or output signals. They can have a pull-up or pull-down device selected
and enabled on per signal basis. Out of reset the pull devices are disabled .
1.7.2.16
AN[15:0] are the analog inputs of the Analog-to-Digital Converter.
1.7.2.17
1.7.2.17.1
ACMPP is the non-inverting input of the analog comparator.
1.7.2.17.2
ACMPM is the inverting input of the analog comparator.
1.7.2.17.3
ACMPO is the output of the analog comparator.
Freescale Semiconductor
PJ[7:0] / KWJ[7:0] — Port J I/O Signals
PM[3:0] — Port M I/O Signals
PP[7:0] / KWP[7:0] — Port P I/O Signals
PS[7:0] — Port S I/O Signals
PT[7:0] — Port TI/O Signals
AN[15:0] — ADC Input Signals
ACMP Signals
ACMPP — Non-Inverting Analog Comparator Input
ACMPM — Inverting Analog Comparator Input
ACMPO — Analog Comparator Output
MC9S12G Family Reference Manual, Rev.1.23
Device Overview MC9S12G-Family
57

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