ispLSI 3448-70LB432 Lattice, ispLSI 3448-70LB432 Datasheet - Page 8

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ispLSI 3448-70LB432

Manufacturer Part Number
ispLSI 3448-70LB432
Description
CPLD - Complex Programmable Logic Devices USE ispMACH 4000V
Manufacturer
Lattice
Datasheet

Specifications of ispLSI 3448-70LB432

Product Category
CPLD - Complex Programmable Logic Devices
Memory Type
EEPROM
Number Of Macrocells
256
Maximum Operating Frequency
83 MHz
Delay Time
18 ns
Number Of Programmable I/os
224
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Package / Case
HBGA
Mounting Style
SMD/SMT
Factory Pack Quantity
21
Supply Current
470 mA
Supply Voltage - Max
5.25 V
Supply Voltage - Min
4.75 V
1. Internal Timing Parameters are not tested and are for reference only.
2. Refer to Timing Model in this data sheet for further details.
Internal Timing Parameters
PARAMETER
Outputs
t
t
t
t
Clocks
t
t
Global Reset
t
t
t
ob
obs
oen
odis
gy0/1/2
ioy3/4
gr
goe
toe
47 Output Buffer Delay
48 Output Buffer Delay, Slew Limited Adder
49 I/O Cell OE to Output Enabled
50 I/O Cell OE to Output Disabled
51 Clock Delay, Y0 or Y1 or Y2 to Global GLB Clock Line
52 Clock Delay, Y3 or Y4 to I/O Cell Global Clock Line
53 Global Reset to GLB and I/O Registers
54 Global OE Pad Buffer
55 Test OE Pad Buffer
#
2
Over Recommended Operating Conditions
1
DESCRIPTION
8
Specifications ispLSI 3448
MIN.
3.5
3.0
-90
MAX.
13.0
9.0
2.5
4.5
4.5
3.5
3.0
5.5
8.5
MIN.
4.0
4.0
-70
MAX.
13.0
10.0
4.0
3.0
5.0
5.0
4.0
9.0
7.0
Table 2-0037/3448
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns

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