AS1542-BTSU ams, AS1542-BTSU Datasheet - Page 18

• Manufacturer Part Number: AS1542-BTSU
• Description: Analog to Digital Converters - ADC
• Manufacturer: ams

Specifications of AS1542-BTSU

• Rohs: yes
• Number Of Channels: 16/8
• Architecture: SAR
• Conversion Rate: 1 MSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Differential
• Snr: 71 dB
• Interface Type: QSPI, SPI
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-28
• Maximum Power Dissipation: 18.4 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1

AS1542
Data Sheet - D e t a i l e d D e s c r i p t i o n
Shadow Register
The shadow register is a 16-bit, write-only register. Data is loaded from pin DIN of the AS1542 on the falling edge of
SCLK. The data is transferred on pin DIN at the same time as a conversion result is read from the device. This requires
16 serial falling edges for the data transfer.
The information is clocked into the shadow register (provided bits
0, 1 respectively), in the previous write to the control register.
Each bit represents one of the input channels (V
cycling on each consecutive CSN falling edge after a write to the shadow register. To select a sequence of channels,
the associated bit must be set for each analog input channel.
The AS1542 will continuously cycle through the selected channels in ascending order, beginning with the lowest chan-
nel, until a write operation occurs (i.e., bit
way except 1, 0
Table 11. 16-Bit Shadow Register Format
Direct Conversion (SEQ = 0, SHADOW = 0)
Figure 28
the next channel for conversion. In this mode of operation, the sequencer function is not used.
Figure 28. Bit SEQ = 0, Bit SHADOW = 0 Flowchart
www.austriamicrosystems.com
(MSB)
Exit this flow whenever WRITE = 1 and NOT (SEQ = 0, SHADOW = 0)
V
15
IN0
CSN Falling
Edge
V
Bit WRITE = 0
14
shows the normal flow of an ADC with multiple input channels selected, where each serial transfer selects
IN1
CSN Falling
Edge
V
(see Table 10 on page
13
IN2
previously selected ADDR3:ADDR0
DOUT: Conversion Result from
V
12
IN3
Channel
Select Coding, Range, SE/FDN, WEAK/TRIN and Power Mode;
V
Select Channel ADDR3:ADDR0
11
IN4
Bit WRITE = 0
V
17).
10
IN5
WRITE (page 14)
DOUT: Dummy Conversion Result
DIN: Write to Control Register;
Bit SEQ = 0, Bit SHADOW = 0
V
9
IN6
Bit SHADOW = 0
CSN Falling
IN0
Bit WRITE = 1
Bit WRITE = 0
Bit WRITE = 1;
Bit SEQ = 0
Edge
Conversion
Power On
through V
Revision 1.00
V
IN7
8
(see Table 5 on page 14)
is set to 1) with bits SEQ and SHADOW configured in any
Bit WRITE = 1, Bit SEQ = 0, Bit SHADOW = 0
V
IN15
7
IN8
Select Coding, Range, SE/FDN, WEAK/
). Multiple channels can be selected for continuous
SEQ (page 14)
previously selected ADDR3:ADDR0
Select Channel ADDR3:ADDR0 for
DOUT: Conversion Result from
V
DIN: Write to Control Register;
Bit SEQ = 0, Bit SHADOW = 0
6
IN9
TRIN and Power Mode;
Bit WRITE = 1;
V
Conversion
IN10
Channel
5
for
and
V
IN11
4
SHADOW (page 14)
V
IN12
3
V
IN13
2
Bit SHADOW = 0
Bit WRITE = 1,
Bit SEQ = 0,
V
IN14
were set to
1
18 - 29
(LSB)
V
IN15
0