5V9351PFGI IDT, 5V9351PFGI Datasheet - Page 4

• Manufacturer Part Number: 5V9351PFGI
• Description: Clock Drivers & Distribution 4 Bank PLL Clock Dvr w/PECL Input
• Manufacturer: IDT

Specifications of 5V9351PFGI

• Rohs: yes
• Part # Aliases: IDT5V9351PFGI

NOTES:
1. V
2. The IDT5V9351 outputs can drive series or paralell terminated 50Ω (or 50Ω to V
FUNCTION TABLE
NOTE:
1. Output frequency relationship with respect to input reference frequency CLK. QC1 is connected to FBIN.
DC ELECTRICAL CHARACTERISTICS
T
IDT5V9351
LOW VOLTAGE PLL CLOCK DRIVER
A
(DC) specification.
Symbol
= -40°C to +85°C, V
CMR
I
V
Z
CCPLL
V
V
V
V
V
I
CMR
I
OUT
CC
IN
PP
OH
OL
f
IH
IL
SELA
(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the V
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Input HIGH Voltage
Input LOW Voltage
Peak-to-Peak Input Voltage
Common Mode
Output HIGH Voltage
Output LOW Voltage
Output Impedance
Input Leakage Current
Maximum Quiescent Supply Current
Maximum PLL Supply Current
f
SELB
CC
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Parameter
= 3.3V ± 5%
(1)
INPUTS
(2)
(2)
(1)
f
SELC
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
LVCMOS Inputs
LVCMOS Inputs
PECL_CLK
PECL_CLK
I
I
I
All V
V
OH
OL
OL
CCA
= 24mA
= 12mA
= -24mA
CC
Only
f
SELD
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Pins
Test Conditions
CC
/2) transmission lines on the incident edge.
4
2 * CLK
2 * CLK
4 * CLK
4 * CLK
2 * CLK
2 * CLK
4 * CLK
4 * CLK
2 * CLK
2 * CLK
2 * CLK
2 * CLK
CLK
CLK
CLK
CLK
Q
A
CLK ÷ 2
CLK ÷ 2
CLK ÷ 2
CLK ÷ 2
2 * CLK
2 * CLK
2 * CLK
2 * CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
Q
B
Min.
250
2.4
—
—
—
—
—
—
—
2
1
OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
CMR
range and the input swing lies within the V
14 - 17
Typ.
—
—
—
—
—
—
—
—
—
3
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
Q
C
V
V
CC
CC
±150
Max
0.55
0.8
0.3
—
—
—
1
5
+ 0.3
- 0.6
CLK ÷ 2
CLK ÷ 2
CLK ÷ 2
CLK ÷ 2
2 * CLK
2 * CLK
2 * CLK
2 * CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
Q
D
Unit
mV
mA
mA
μA
Ω
V
V
V
V
V
PP