MT46H32M16LFBF-6 L IT:B Micron, MT46H32M16LFBF-6 L IT:B Datasheet
MT46H32M16LFBF-6 L IT:B
Related parts for MT46H32M16LFBF-6 L IT:B
MT46H32M16LFBF-6 L IT:B Summary of contents
Page 1
... PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN Products and specifications discussed herein are subject to change by Micron without notice. 512Mb: x16, x32 Mobile LPDDR SDRAM Options • DDQ – 1.8V/1.8V – 1.8V/1.2V • Configuration – 32 Meg Meg banks) – ...
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... Blank = Standard I /I DD2 DD6 L = Low-power I /I DD2 DD6 Cycle Time 5ns CK -54 = 5.4ns CK 6ns CK -75 = 7.5ns CK Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Features ...
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... Rev. I, Production – 12/09 ........................................................................................................................... 96 Rev. H, Production – 03/09 .......................................................................................................................... 96 Rev. G, Production – 02/09 .......................................................................................................................... 96 Rev. F, Production – 10/08 .......................................................................................................................... 96 PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Update – 05/08 ........................................................................................................................................... 97 Update – 05/08 ........................................................................................................................................... 97 Update – 03/08 ........................................................................................................................................... 98 Update – 12/07 ........................................................................................................................................... 98 Update – 07/07 ........................................................................................................................................... 98 PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM 4 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Table 19: Truth Table – Current State Bank n – Command to Bank m .............................................................. 43 Table 20: Truth Table – CKE .......................................................................................................................... 46 Table 21: Burst Definition Table .................................................................................................................... 52 PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM 5 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Mobile LPDDR SDRAM t t DQSQ, QH, and Data Valid Window (x16) ................................................... DQSQ, QH, and Data Valid Window (x32) ................................................... and DQSCK .......................................................................................... 70 6 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Figure 52: Power-Down Mode (Active or Precharge) ....................................................................................... 93 Figure 53: Deep Power-Down Mode .............................................................................................................. 94 Figure 54: Clock Stop Mode ........................................................................................................................... 95 PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM 7 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Any specific requirement takes precedence over a general statement. PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM General Description 8 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Write 4 32 FIFO and 16 16 drivers Data in out CK COL 0 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. DRVRS DQ0– DQ15 DQS LDQS, UDQS 2 RCVRS LDM, UDM 16 2 ...
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... FIFO and 32 32 drivers Data in out CK COL 0 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. DRVRS DQ0– DQ31 DQS DQS0 DQS1 DQS2 4 DQS3 RCVRS DM0 DM1 32 DM2 ...
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... DQ4 V DDQ DQ5 DQ6 1 TEST DQ7 LDQS V DDQ NC LDM V DD WE# CAS# RAS# CS# BA0 BA1 A10/ normal operations. SS SSQ Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... DQ8 SSQ V DQ9 DQ10 DDQ V DQ11 DQ12 SSQ V DQ13 DQ14 DDQ V DQ15 V SS SSQ 12 Micron Technology, Inc. reserves the right to change products or specifications without notice. Ball Assignments and Descriptions DQ16 V DDQ DD DQ17 DQ18 V SSQ DQ19 DQ20 V DDQ DQ21 DQ22 ...
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... Data strobe: Output with read data, input with write data. DQS output is edge-aligned with read data, center-aligned in write data used to capture data. 13 Ball Assignments and Descriptions Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Do not use. A13 if reduced page-size option is selected; other- wise, DNU. TEST Input Test pin: Must be tied Ball Assignments and Descriptions normal operations. SS SSQ Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Package Dimensions Solder ball material: SAC105 (98.5% Sn, 1% Ag, 0.5% Cu) Substrate material: plastic laminate Mold compound: epoxy novolac Micron logo to be lased ball A1 ID 1.0 MAX Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... 0.8 TYP 6.4 16 Package Dimensions Solder ball material: SAC105 (98.5% Sn, 1% Ag, 0.5% Cu) Substrate material: plastic laminate Mold compound: epoxy novolac Ball A1 ID 1.0 MAX Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Ball ±0 0.8 TYP 6.4 CTR 9 ±0.1 17 Package Dimensions Ball A1 ID 1.0 MAX 0.25 MIN Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... V + 0.3 DDQ DDQ –0.3 0.2 × V DDQ – DDQ – 0.1 × V DDQ μA –1 1 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Unit V V ˚C Notes ...
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... DDQ – 0.1 × V DDQ μA –1 1 μA – +70 –40 +85 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Notes ˚C ˚C Notes ...
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... DDQ Min Max 2.0 4.0 – 0.5 2.0 4.0 – 1.0 2.0 4.5 – 1.0 = 1.70–1.95V 100 MHz 25˚ Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved Unit Notes OUT(DC) ...
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... The I/O capacitance per DQS and DQ byte/group will not differ by more than this maxi- PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM mum amount for any given device. 21 Electrical Specifications Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... I DD4R (MIN); Con- I DD4W t RFC = 110ns I DD5 t t RFC = REFI I DD5A I DD8 22 Micron Technology, Inc. reserves the right to change products or specifications without notice. Parameters DD Max -5 -54 -6 -75 Unit Notes μA 300 300 300 300 μA 300 300 ...
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... Address inputs are (MIN); I DD4W t RFC = 110ns I DD5 t t RFC = REFI I DD5A I DD8 23 Micron Technology, Inc. reserves the right to change products or specifications without notice. Parameters DD Max -5 -54 -6 -75 Unit Notes μA 300 300 300 300 μA ...
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... IH /2 (or to the crossing point for CK/CK#). The DDQ /2. DDQ t CK that meets the t RAS (MAX) for I Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Parameters DD Standard Units μA 700 μA 390 μ ...
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... Mobile LPDDR SDRAM Electrical Specifications – 100 105 Temperature (°C) 25 Micron Technology, Inc. reserves the right to change products or specifications without notice. Parameters DD Full array 1/2 array 1/4 array 1/8 array 1/16 array ...
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... DQSQ QH - DQSQ QH - DQSQ Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Unit Notes 6.0 ns 6.5 – – – – 12 – ns 13, 14, 15 – ...
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... Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Unit Notes – 6.0 ns 19, 20 6.5 – – ns 15, 21 – – ns 15, 21 – – ...
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... Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Unit Notes t CK – ns – – CK – – ...
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... CH (MIN) actually applied to the device CK and t t HZ) or begins driving ( LZ). t RPST (MAX) condition time when in auto precharge mode. t XSR period. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved AC) after the IH(DC) t ...
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... DDQ Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Max 0.00 –18.53 –26.80 –32.80 –37.05 –40.00 –42.50 –44.57 –46.50 –47.48 – ...
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... Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Max 0.00 –12.97 –18.76 –22.96 –25.94 –28.00 –29.75 –31.20 –32.55 –33.24 – ...
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... Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Max 0.00 –9.38 –12.97 –15.87 –18.33 –20.34 –22.63 –25.03 –27.14 –29.91 – ...
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... DDQ Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Max 0.00 –8.42 –12.30 –14.95 –16.84 –18.20 –19.30 –20.30 –21.20 –21.60 – ...
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... The DLL that is typically used on standard DDR devices is not necessary on LPDDR de- vices. It has been omitted to save power. PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM Functional Description 34 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
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... Bank/row Bank/column Bank/column Code Op-code Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Commands Notes ...
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... PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM Valid MRD is met. 36 Micron Technology, Inc. reserves the right to change products or specifications without notice. Commands Notes © 2004 Micron Technology, Inc. All rights reserved. ...
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... PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM CK# CK CKE HIGH CS# WE# Row Bank Don’t Care 37 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Commands ...
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... Mobile LPDDR SDRAM CK# CK CKE HIGH CS# RAS# WE# Column EN AP A10 DIS AP Bank Don’t Care WTR are satisfied. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Commands ...
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... CK# CK CKE HIGH CS# WE# Column EN AP A10 DIS AP Bank Don’t Care t RP) after the PRECHARGE command is issued. Input A10 determines 39 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Commands ...
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... Mobile LPDDR SDRAM CK# CK CKE HIGH CS# WE# All banks A10 Single bank Bank Don’t Care 40 t RFC later. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Commands ...
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... Care” with the exception of CKE, which must re- main LOW. Micron recommends that, prior to self refresh entry and immediately upon self refresh exit, the user perform a burst auto refresh cycle for the number of refresh rows. Alterna- tively distributed refresh pattern is used, this pattern should be immediately resumed upon self refresh exit ...
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... XP has been met (if the previous state was power has been met. t RCD has been met. No data bursts/ Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Truth Tables Notes 7 7 ...
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... RP is met, the bank will has been met. After RP is met, the bank t MRD is met, the device will be in the all Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Truth Tables t RFC Notes 7 ...
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... WR measured as if auto t RP) begins. This device supports concurrent auto Minimum Delay (with Concurrent Auto Precharge (BL/2)] (BL/2) Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Truth Tables Notes WTR ...
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... BURST TERMINATE must be used to end the READ burst prior to asserting a WRITE com- mand. 45 Minimum Delay (with Concurrent Auto Precharge) (BL/2) × [CL + (BL/2)] Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Truth Tables ...
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... Precharge power-down entry Self refresh entry was the state of CKE at the previ XSR period. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Truth Tables Notes result of COM- ...
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... DPDX = Exit deep power-down EMR = LOAD EXTENDED MODE REGISTER LMR = LOAD MODE REGISTER PRE = PRECHARGE PREALL = PRECHARGE all banks READ = READ w/o auto precharge 47 Micron Technology, Inc. reserves the right to change products or specifications without notice. State Diagram READ READ SRR AREF Auto ...
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... V DDQ t IS prior to T0 (see Figure time. t RFC time. Two AUTO REFRESH commands t MRD time. t MRD time. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. DDQ ...
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... MRD RFC MRD Load standard mode register Load extended mode register Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Initialization Te0 Tf0 ( ( ) ) ( ( ) ) ( ( ...
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... AR LMR LMR ACT ( ( ( ( ( ( ) ) ) ) ) ) Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Initialization Te0 Tf0 ( ( ) ) ( ( ) ) ( ( ) ) ( ( ) ) ( ( NOP ( ( ) ) Don’t Care ...
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... Reserved M3 Burst Type CAS Latency 0 Sequential Reserved 1 Interleaved Reserved 2 3 Reserved Reserved Reserved Reserved Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved Reserved Reserved Reserved Reserved ...
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... A0 0 0 0-1-2 1-2-3 2-3-0 3-0-1 0-1-2-3-4-5-6 1-2-3-4-5-6-7 2-3-4-5-6-7-0 3-4-5-6-7-0-1 4-5-6-7-0-1-2 5-6-7-0-1-2-3 6-7-0-1-2-3-4 7-0-1-2-3-4-5 Standard Mode Register Type = Interleaved 0-1 1-0 0-1-2-3 1-0-3-2 2-3-0-1 3-2-1-0 0-1-2-3-4-5-6-7 1-0-3-2-5-4-7-6 2-3-0-1-6-7-4-5 3-2-1-0-7-6-5-4 4-5-6-7-0-1-2-3 5-4-7-6-1-0-3-2 6-7-4-5-2-3-0-1 7-6-5-4-3-2-1-0 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 53
... A-B-C-D-E-F-0-1-2-3-4-5-6-7-8 B-C-D-E-F-0-1-2-3-4-5-6-7-8-9 C-D-E-F-0-1-2-3-4-5-6-7-8-9-A D-E-F-0-1-2-3-4-5-6-7-8-9-A-B E-F-0-1-2-3-4-5-6-7-8-9-A-B-C F-0-1-2-3-4-5-6-7-8-9-A-B-C-D-E t AC). For the READ command is regis- 53 Standard Mode Register Type = Interleaved 0-1-2-3-4-5-6-7-8-9-A-B-C-D-E-F 1-0-3-2-5-4-7-6-9-8-B-A-D-C-F-E 2-3-0-1-6-7-4-5-A-B-8-9-E-F-C-D 3-2-1-0-7-6-5-4-B-A-9-8-F-E-D-C 4-5-6-7-0-1-2-3-C-D-E-F-8-9-A-B 5-4-7-6-1-0-3-2-D-C-F-E-9-8-B-A 6-7-4-5-2-3-0-1-E-F-C-D-A-B-8-9 7-6-5-4-3-2-1-0-F-E-D-C-B-A-9-8 8-9-A-B-C-D-E-F-0-1-2-3-4-5-6-7 9-8-B-A-D-C-F-E-1-0-3-2-5-4-7-6 A-B-8-9-E-F-C-D-2-3-0-1-6-7-4-5 B-A-9-8-F-E-D-C-3-2-1-0-7-6-5-4 C-D-E-F-8-9-A-B-4-5-6-7-0-1-2-3 D-C-F-E-9-8-B-A-5-4-7-6-1-0-3-2 E-F-C-D-A-B-8-9-6-7-4-5-2-3-0-1 F-E-D-C-B-A-9-8-7-6-5-4-3-2-1-0 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. t AC). ...
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... T3n NOP NOP OUT OUT OUT OUT T2 T2n T3 T3n NOP NOP OUT OUT Transitioning Data Don’t Care Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 55
... Partial-Array Self Refresh Coverage Full array 1/2 array 1/4 array Reserved Reserved 1/8 array 1/16 array Reserved Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 56
... The output driver settings are 25Ω, 37Ω, and 55Ω internal impedance for full, three-quarter, and one-half drive strengths, respectively. PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM Extended Mode Register 56 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 57
... SRC after the SRR READ com SRC NOP NOP NOP SRR out Don’t Care t SRC). Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. t SRR time. t SRC. T8 Valid Note 5 4 Transitioning Data ...
Page 58
... ESMT NVM Reserved Reserved Reserved Reserved Micron t REFI × multiplier. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 59
... ACTIVE commands to different banks is defined t by RRD. PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM t RCD specification. 59 Micron Technology, Inc. reserves the right to change products or specifications without notice. Bank/Row Activation t RC. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 60
... Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM t DQSQ (valid data-out skew), t DQSCK (DQS transition skew to CK) and 60 Micron Technology, Inc. reserves the right to change products or specifications without notice. READ Operation t QH (data-out © 2004 Micron Technology, Inc. All rights reserved. ...
Page 61
... T3n T4 NOP NOP D D OUT OUT T3 T3n T4 NOP NOP OUT OUT OUT OUT Don’t Care t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T5 NOP T5 NOP Transitioning Data ...
Page 62
... T3n T4 T4n T5 NOP NOP NOP OUT OUT OUT OUT OUT Don’t Care Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T5n D OUT T5n D OUT ...
Page 63
... T3n T4 T4n T5 T5n NOP NOP OUT OUT OUT Don’t Care Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T6 NOP D D OUT OUT T6 NOP D OUT ...
Page 64
... READ NOP NOP Bank, Col OUT OUT OUT OUT OUT Don’t Care Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T5n D OUT T5n D OUT ...
Page 65
... AC, DQSCK, and 65 READ Operation NOP NOP NOP T3 T3n T4 T5 NOP NOP NOP D OUT OUT Don’t Care Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 66
... T5 1 NOP WRITE NOP Bank, Col b t DQSS (NOM OUT OUT IN Don’t Care Transitioning Data t DQSQ. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T5n D IN T5n D IN ...
Page 67
... NOP NOP ACT Bank a, Row OUT OUT OUT OUT Don’t Care Transitioning Data t DQSQ. t RAS (MIN) is met, would Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved ...
Page 68
... T2n T3 T3n T2n T3 T3n Data valid Data valid Data valid window window window t DQSQ window. LDQS defines the low- t QHS. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved DQSQ. ...
Page 69
... 2,3 t 2,3 DQSQ DQSQ T3n T3 T3n T3 T3n Data valid Data valid window window t DQSQ window. t QHS Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. t DQSQ. ...
Page 70
... T5n 1 1 NOP NOP t DQSCK T4 T3 T3n T4n DQSQ window. t AC. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved NOP RPST T5 T5n t HZ Don’t Care ...
Page 71
... Mobile LPDDR SDRAM DQSS [MAX]) might not be obvious, they have also been included. Figure 35 71 Micron Technology, Inc. reserves the right to change products or specifications without notice. WRITE Operation t WTR are satisfied. t DQSS for a burst of 4. Upon ...
Page 72
... DQ[7:0], DM1 controls DQ[15:8], DM2 controls DQ[23:16], and DM3 controls DQ[31:24]. 72 WRITE Operation met. T2 T2n DSH DSS t t DQSH WPST Don’t Care t DQSS (MIN). t DQSS (MAX). Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 73
... NOP DQSL DQSH WPST Don’t Care Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved PRE All banks One bank 5 Bank Transitioning Data ...
Page 74
... IN DM Don’t Care b = data-in for column WRITE Operation T2 T2n T3 NOP NOP Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. ...
Page 75
... IN IN Don’t Care Transitioning Data T3 T4 T4n T5 1,2 NOP NOP Bank, Col Don’t Care Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T5n D IN ...
Page 76
... NOP Bank, Bank, Col a Col Don’t Care Transitioning Data b ( according to the program- IN Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T5n D IN ...
Page 77
... NOP 4 Bank a, Col Don’t Care Transitioning Data t WTR is not required and the Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T6 T6n NOP D D OUT OUT D D OUT ...
Page 78
... OUT 78 WRITE Operation T4 T5 T5n NOP NOP Don’t Care Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T6 T6n NOP D D OUT OUT D OUT OUT D D ...
Page 79
... OUT 79 WRITE Operation T4 T5 T5n NOP NOP Don’t Care Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T6 T6n NOP D D OUT OUT D OUT OUT D D ...
Page 80
... WR is referenced from the first positive CK edge after the last data-in pair data-in for column WRITE Operation T4 T5 3,4 NOP PRE Bank (a or all) Don’t Care Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T6 NOP not ...
Page 81
... WR is referenced from the first positive CK edge after the last data-in pair data-in for column WRITE Operation T3n T4 T4n T5 3 PRE NOP Bank (a or all) Don’t Care Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T6 NOP ...
Page 82
... WR is referenced from the first positive CK edge after the last data-in pair data-in for column WRITE Operation T3n T4 T4n T5 3 NOP PRE Bank (a or all) Don’t Care Transitioning Data Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T6 NOP ...
Page 83
... RAS lock-out. In the case of a single READ with auto precharge or t RCD (MIN), the internal precharge will be t RAS (MIN) has been satisfied. 83 Micron Technology, Inc. reserves the right to change products or specifications without notice. PRECHARGE Operation t RAS (MIN), as described for t WR ...
Page 84
... In either situation, all other related limitations apply (for example, contention between READ data and WRITE data must be avoided). PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM 84 Micron Technology, Inc. reserves the right to change products or specifications without notice. Auto Precharge © 2004 Micron Technology, Inc. All rights reserved. ...
Page 85
... RPST OUT OUT OUT OUT t AC (MAX (MAX) Don’t Care Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved NOP ACTIVE Row Row Bank x Transitioning Data ...
Page 86
... DQSCK (MAX) RPST OUT OUT OUT OUT t HZ (MAX) Don’t Care Transitioning Data t RAS (MIN) is met. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. T8 ACTIVE Row Row Bank x ...
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... Auto Precharge T4n T5 T5n NOP NOP NOP DQSL DQSH WPST t DH Don’t Care Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved NOP t RP Transitioning Data ...
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... NOP NOP NOP DQSL DQSH WPST Don’t Care Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved PRE All banks One bank 5 Bank Transitioning Data ...
Page 89
... RFC RFC t RFC later. Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Tb2 ACTIVE Row Row Bank Don’t Care t RFC time; CKE ...
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... Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM t XSR to complete any internal refresh already in progress. 90 Micron Technology, Inc. reserves the right to change products or specifications without notice. SELF REFRESH Operation t REFI time. For this reason, © 2004 Micron Technology, Inc. All rights reserved. ...
Page 91
... Enter self refresh mode 91 Micron Technology, Inc. reserves the right to change products or specifications without notice. Power-Down 1 Ta1 Tb0 ( ( ) ) ( ( ) ) NOP Valid ( ( ) ) ...
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... PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM CK# CK CKE CS# Or CS# Address BA0, BA1 Don’t Care 92 Micron Technology, Inc. reserves the right to change products or specifications without notice. Power-Down © 2004 Micron Technology, Inc. All rights reserved. ...
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... RP time must be met). DPD mode is entered by holding CS# and WE# 93 Power-Down Ta1 Ta2 t 1 CKE NOP Valid Valid Exit power-down mode t XP applies if CKE remains Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Tb1 Don’t Care ...
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... Enter deep power-down mode 94 Power-Down Ta1 Ta2 T = 200µs NOP NOP Exit deep power-down mode Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved. Ta3 3 PRE Don’t Care ...
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... Clock Change Frequency Tb4 2 NOP NOP All DRAM activities must be complete Enter clock stop mode Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2004 Micron Technology, Inc. All rights reserved RCD, RP ...
Page 96
... Mobile LPDDR SDRAM t RFC values from 97.5ns to 72ns in Table 11 (page 26). t CKE symbol in Table 11 (page 26). t CKE line to Figure 50 (page 91). 96 Micron Technology, Inc. reserves the right to change products or specifications without notice. Revision History © 2004 Micron Technology, Inc. All rights reserved. ...
Page 97
... Added “L” low-power option to Figure 1: “512Mb Mobile DDR Part Numbering” and Table 9: “Idd6 Specifications and Conditions” PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM 97 Micron Technology, Inc. reserves the right to change products or specifications without notice. Revision History © 2004 Micron Technology, Inc. All rights reserved. ...
Page 98
... Although considered final, these specifications are subject to change, as further product development and data characterization some- PDF: 09005aef82d5d305 512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN 512Mb: x16, x32 Mobile LPDDR SDRAM times occur. 98 Micron Technology, Inc. reserves the right to change products or specifications without notice. Revision History © 2004 Micron Technology, Inc. All rights reserved. ...