MT47H64M16HR-25E AIT:H Micron, MT47H64M16HR-25E AIT:H Datasheet - Page 90

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MT47H64M16HR-25E AIT:H

Manufacturer Part Number
MT47H64M16HR-25E AIT:H
Description
Ic Ddr2 Sdram 1gbit 84fbga
Manufacturer
Micron
Datasheet
Figure 44: Consecutive READ Bursts
PDF: 09005aef840eff89
1gbddr2_ait_aat.pdf – Rev. C 7/11 EN
Notes:
DQS, DQS#
DQS, DQS#
Command
Command
Address
Address
1. DO n (or b) = data-out from column n (or column b).
2. BL = 4.
3. Three subsequent elements of data-out appear in the programmed order following
4. Three subsequent elements of data-out appear in the programmed order following
5. Shown with nominal
6. Example applies only when READ commands are issued to same device.
CK#
CK#
DQ
DQ
CK
CK
DO n.
DO b.
READ
READ
Bank,
Bank,
Col n
Col n
T0
T0
t CCD
RL = 3
t CCD
NOP
NOP
T1
T1
RL = 4
t
AC,
90
t
DQSCK, and
READ
READ
Bank,
Bank,
Col b
Col b
T2
T2
1Gb: x8, x16 Automotive DDR2 SDRAM
T2n
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
NOP
t
T3
T3
DQSQ.
DO
n
T3n
T3n
NOP
NOP
T4
T4
DO
n
Transitioning Data
T4n
T4n
NOP
NOP
T5
T5
2010 Micron Technology, Inc. All rights reserved.
DO
b
T5n
T5n
T6
NOP
T6
NOP
Don’t Care
DO
b
T6n
T6n
READ

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