AT45DB021D-SSH-B-RET Atmel, AT45DB021D-SSH-B-RET Datasheet - Page 32

• Manufacturer Part Number: AT45DB021D-SSH-B-RET
• Manufacturer: Atmel

17.
32
Figure 16-2. Output Test Load
AC Waveforms
Six different timing waveforms are shown on
makes a high-to-low transition, and waveform 2 shows the SCK signal being high when CS makes a high-to-low
transition. In both cases, output SO becomes valid while the SCK signal is still low (SCK low time is specified as
t
Waveforms 1 and 2 are compatible with SPI Mode 0 and SPI Mode 3, respectively.
Waveform 3 and waveform 4 illustrate general timing diagram for RapidS serial interface. These are similar to
waveform 1 and waveform 2, except that output SO is not restricted to become valid during the t
timing waveforms are valid over the full frequency range (maximum frequency = 66MHz) of the RapidS serial case.
Figure 17-1. Waveform 1 – SPI Mode 0 Compatible (for Frequencies up to 66MHz)
Figure 17-2. Waveform 2 – SPI Mode 3 Compatible (for Frequencies up to 66MHz)
WL
SCK
SCK
Atmel AT45DB021D
SO
SO
CS
CS
SI
SI
). Timing waveforms 1 and 2 conform to Atmel
DEVICE
UNDER
TEST
HIGH IMPEDANCE
HIGH Z
t
CSS
t
SU
t
t
CSS
V
t
SU
VALID IN
t
WL
30pF
VALID IN
VALID OUT
t
WH
t
WH
t
V
t
HO
t
H
t
H
t
WL
VALID OUT
t
HO
t
page
CSH
t
CSH
®
32. Waveform 1 shows the SCK signal being low when CS
RapidS
HIGH IMPEDANCE
t
t
DIS
HIGH IMPEDANCE
t
CS
t
DIS
CS
™
serial interface but for frequencies up to 66MHz.
WL
3638J–DFLASH–5/10
period. These