MC100EP57DTG ON Semiconductor, MC100EP57DTG Datasheet - Page 9

IC MUX 4:1 DIFF ECL 5V 20TSSOP

MC100EP57DTG

Manufacturer Part Number
MC100EP57DTG
Description
IC MUX 4:1 DIFF ECL 5V 20TSSOP
Manufacturer
ON Semiconductor
Series
100EPr
Type
Differential Digital Multiplexerr
Datasheet

Specifications of MC100EP57DTG

Circuit
4 x 2:1
Independent Circuits
1
Voltage Supply Source
Dual Supply
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Product
Decoders, Encoders, Multiplexers & Demultiplexers
Logic Family
MC100E
Number Of Lines (input / Output)
4.0 / 1.0
Propagation Delay Time
0.475 ns at 3 V to 5.5 V
Supply Voltage (max)
- 5.5 V, + 5.5 V
Supply Voltage (min)
- 3 V, + 3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Input Lines
4.0
Number Of Output Lines
1.0
Logical Function
Mux
Configuration
1 x 4:1
Number Of Inputs
4
Number Of Outputs
1
Operating Supply Voltage (typ)
-3.3/-5/3.3/5V
Operating Supply Voltage (min)
-3/3V
Operating Supply Voltage (max)
-5.5/5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Logic Type
Multiplexer
No. Of Channels
1
Ratio
4
Supply Voltage Range
3V To 5.5V
Logic Case Style
TSSOP
No. Of Pins
20
Operating Temperature Range
-40°C To +85°C
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MC100EP57DTGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC100EP57DTG
Manufacturer:
ON/安森美
Quantity:
20 000
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
− ECL Clock Distribution Techniques
− Designing with PECL (ECL at +5.0 V)
− ECLinPSt I/O SPiCE Modeling Kit
− Metastability and the ECLinPS Family
− Interfacing Between LVDS and ECL
− The ECL Translator Guide
http://onsemi.com
9

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