P520-05OC PLL [PhaseLink Corporation], P520-05OC Datasheet - Page 4

• Manufacturer Part Number: P520-05OC
• Description: Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal)
• Manufacturer: PLL [PhaseLink Corporation]

4. General Electrical Specifications
5. Jitter Specifications
Measured on Wavecrest SIA 3000
6. Phase Noise Specifications
Note: Phase Noise measured at VCON = 0V
7. CMOS Electrical Specifications
* Note: High Drive CMOS is available on PLL520-06 through DRIVSEL selector input on pin 12.
47745 Fremont Blvd., Fremont, California 94538 Tel [phone] Fax [phone] www.phaselink.com Rev 09/20/04 Page 4
Supply Current (Loaded
Outputs)
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
Period jitter RMS
Period jitter peak-to-peak
Accumulated jitter RMS
Accumulated jitter peak-to-peak
Random Jitter
Integrated jitter RMS at 155MHz
Period jitter RMS
Period jitter peak-to-peak
Accumulated jitter RMS
Accumulated jitter peak-to-peak
Random Jitter
Integrated jitter RMS at 622MHz
Phase Noise relative
to carrier
Output drive current
(High Drive)
Output drive current
(Standard Drive)
Output Clock Rise/Fall Time
(Standard Drive)
Output Clock Rise/Fall Time
(High Drive)
PARAMETERS
PARAMETERS
PARAMETERS
PARAMETERS
Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal)
FREQUENCY
155.52MHz
622.08MHz
SYMBOL
SYMBOL
V
I
DD
DD
I
I
I
I
At 155.52MHz, with capacitive decoupling
between VDD and GND. Over 10,000
cycles
At 155.52MHz, with capacitive decoupling
between VDD and GND. Over 1,000,000
cycles.
“RJ” measured on Wavecrest SIA 3000
Integrated 12 kHz to 20 MHz
At 622.08MHz, with capacitive decoupling
between VDD and GND. Over 10,000
cycles
At 622.08MHz, with capacitive decoupling
between VDD and GND. Over 1,000,000
cycles.
“RJ” measured on Wavecrest SIA 3000
Integrated 12 kHz to 20 MHz
OH
OL
OH
OL
PECL/LVDS/CMOS
@ 50% V
@ 1.25V (LVDS)
@ V
@10Hz
V
V
V
V
0.3V ~ 3.0V with 15 pF load
0.3V ~ 3.0V with 15 pF load
OH
OL
OH
OL
-75
-75
DD
= V
= V
= 0.4V, V
= 0.4V, V
CONDITIONS
– 1.3V (PECL)
CONDITIONS
DD
DD
DD
PLL520-05/-06/-07/-08/-09
CONDITIONS
-0.4V, V
-0.4V, V
(CMOS)
DD
DD
@100Hz
= 3.3V
= 3.3V
DD
DD
-95
-95
=3.3V
=3.3V
@1kHz
-125
-110
MIN.
30
30
10
10
MIN.
MIN.
2.97
45
45
45
@10kHz
-140
-125
TYP.
2.4
1.2
TYP.
TYP.
±50
18.5
50
50
50
2.5
2.5
2.5
0.3
1.6
24
11
45
11
24
3
@100kHz
MAX.
100/80/40
-145
-120
MAX.
MAX.
3.63
55
55
55
0.4
1.8
20
27
49
27
UNITS
UNITS
dBc/Hz
mA
mA
mA
mA
UNITS
UNITS
ns
mA
mA
ps
ps
ps
ps
ps
ps
ps
ps
%
V