EN29LV040A EON [Eon Silicon Solution Inc.], EN29LV040A Datasheet - Page 6

no-image

EN29LV040A

Manufacturer Part Number
EN29LV040A
Description
4 Megabit (512K x 8-bit ) Uniform Sector, CMOS 3.0 Volt-only Flash Memory
Manufacturer
EON [Eon Silicon Solution Inc.]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EN29LV040A-55JC
Manufacturer:
EON
Quantity:
2 380
Part Number:
EN29LV040A-55JC
Manufacturer:
EON
Quantity:
2 380
Part Number:
EN29LV040A-55JC
Manufacturer:
EON
Quantity:
5 000
Part Number:
EN29LV040A-55RJC
Manufacturer:
EON
Quantity:
20 000
Part Number:
EN29LV040A-70JC
Manufacturer:
EON
Quantity:
6 000
Part Number:
EN29LV040A-70JC
Manufacturer:
EON
Quantity:
6 000
Part Number:
EN29LV040A-70JCCP
Manufacturer:
EON
Quantity:
20 000
Company:
Part Number:
EN29LV040A-70JCCP
Quantity:
490
Company:
Part Number:
EN29LV040A-70JCCP
Quantity:
480
Company:
Part Number:
EN29LV040A-70JCCP
Quantity:
480
Part Number:
EN29LV040A-70JPC
Quantity:
10
Part Number:
EN29LV040A-70SCP
Manufacturer:
EON
Quantity:
20 000
Company:
Part Number:
EN29LV040A-70SCP
Quantity:
410
Part Number:
EN29LV040A-70TCP
Manufacturer:
EON
Quantity:
1 000
USER MODE DEFINITIONS
Standby Mode
The EN29LV040A has a CMOS-compatible standby mode, which reduces the current to < 1µA
(typical). It is placed in CMOS-compatible standby when the
has a TTL-compatible standby mode, which reduces the maximum V
placed in TTL-compatible standby when the
are in a high-impedance state independent of the
Read Mode
The device is automatically set to reading array data after device power-up. No commands are required to
retrieve data. The device is also ready to read array data after completing an Embedded Program or
Embedded Erase algorithm.
After the device accepts an Erase Suspend command, the device enters the Erase Suspend mode. The
system can read array data using the standard read timings, except that if it reads at an address within
erase-suspended sectors, the device outputs status data. After completing a programming operation in
the Erase Suspend mode, the system may once again read array data with the same exception. See
“Erase Suspend/Erase Resume Commands” for more additional information.
The system
high, or while in the autoselect mode. See the “Reset Command” additional details.
Output Disable Mode
When the
The output pins are placed in a high impedance state.
Auto Select Identification Mode
The autoselect mode provides manufacturer and device identification, and sector protection
verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for
programming equipment to automatically match a device to be programmed with its corresponding
programming algorithm. However, the autoselect codes can also be accessed in-system through the
command register.
When using programming equipment, the autoselect mode requires V
Address pins A8, A6, A1, and A0 must be as shown in Autoselect Codes table. In addition, when
verifying sector protection, the sector address must appear on the appropriate highest order address
bits. Refer to the corresponding Sector Address Tables. The Command Definitions table shows the
remaining address bits that are don’t-care. When all necessary bits have been set as required, the
programming equipment may then read the corresponding identifier code on DQ7–DQ0.
To access the autoselect codes in-system; the host system can issue the autoselect command via
the command register, as shown in the Command Definitions table. This method does not require
V
Write Mode
Write operations, including programming data and erasing sectors of memory, require the host
system to write a command or command sequence to the device. Write cycles are initiated by
placing the byte or word address on the device’s address inputs while the data to be written is input
on DQ[7:0]. The host system must drive the CE# and WE# pins Low and the OE# pin High for a
valid write operation to take place. All addresses are latched on the falling edge of WE# and CE#,
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
ID
. See “Command Definitions” for details on using the autoselect mode.
CE
must
or
OE
issue the reset command to re-enable the device for reading array data if DQ5 goes
pin is at a logic high level (V
CE
Rev. A, Issue Date: 2005/08/16
pin is at V
OE
IH
6
), the output from the EN29LV040A is disabled.
input.
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
IH
. When in standby modes, the outputs
CE
pin is at V
ID
CC
(11 V) on address pin A9.
CC
current to < 1mA. It is
EN29LV040A
± 0.3. The device also

Related parts for EN29LV040A