IMP811JEUS-T IMP [IMP, Inc], IMP811JEUS-T Datasheet - Page 5

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IMP811JEUS-T

Manufacturer Part Number
IMP811JEUS-T
Description
4-pin ?P Voltage Supervisor with Manual Reset
Manufacturer
IMP [IMP, Inc]
Datasheet

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Reset Timing and Manual Reset (MR)
The reset signal is asserted–LOW for the IMP811 and HIGH for
the IMP812 – when the V
voltage and remains asserted for 140ms minimum after the V
has risen above the threshold.
A logic low on MR asserts RESET LOW on the IMP811 and HIGH
on the IMP812. MR is internally pulled high through a 20kΩ
resistor and can be driven by TTL/CMOS gates or with open
collector/drain outputs. MR can be left open if not used.
1999 IMP, Inc.
RESET
RESET
CC
V
MR
CC
signal falls below the threshold trip
5V
0V
5V
0V
5V
0V
5V
0V
Figure 1. Reset Timing and Manual Reset (MR)
Timeout Period
Active Reset
408-432-9100/www.impweb.com
CC
MR may be connected to a normally-open switch connected to
ground without an external debounce circuit.
For added noise rejection, a 0.1µF capacitor from MR to Ground
can be added.
V
TH
minimum
140ms
Timeout Period
Active Reset
IMP8
IMP8
811/12_03.eps
Detailed Description
IMP811
IMP812
1
1
1
1
, IMP8
, IMP8
1
1
2
2
5

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