PM8610-BIAP PMC [PMC-Sierra, Inc], PM8610-BIAP Datasheet - Page 299

• Manufacturer Part Number: PM8610-BIAP
• Description: SBS Telecom Standard Product Data Sheet Preliminary
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000168, Issue 3
Information flows from left to right. Each edge connects an egress port (on the left) to an ingress
port (on the right); each such edge has a capacity of 9720 timeslots.
For present purposes, we consider the SBSs to be supporting a single P-SBI port (eight bits at
77.76 MHz, or STS-12). Also, we ignore the “standby” LVDS port. This reduces the SBS from a
multi-ported Memory switch (which it in fact is) to a simpler two-ported (P-SBI and Active S-
SBI) Time switch. This reduction in complexity makes the following discussion more
straightforward, but does not reduce the algorithm’s ability to deal with the more complex cases
introduced by the use of the four slower P-SBI ports, or by concurrent use of the standby LVDS
port. The nature of switching in this application is illustrated by Figure 19. The two dimensional
4-X-4 matrices represent octet slots in both space (vertical) and time (horizontal).
We trace through the switching processing in the following steps:
It is known that any complete permutation from Matrix I to Matrix IV can be carried out in this
way. Figure 19 illustrates two particular octets ( and ) being switched through the
SBS:NSE:SBS Time:Space:Time switch.
Figure 24 Example Graph
Ingress SBSs
Matrix I represents the arrival of the 16 octets from the SBI load devices.
The mapping from Matrix I to Matrix II represents the Time switching action of all four
ingress SBSs. Each SBS carries out an arbitrary permutation (including 1-to-many) of the
ingress Time slots within each Space row.
The mapping from Matrix II to Matrix III represents the Space switching action of the NSE.
During each Time slot, the NSE-20G carries out an arbirary permutation (including 1-to-
many) of the ingress Space slots.
The mapping from Matrix III to Matrix IV represents the Time switching action of all four
egress SBSs. Each SBS carries out an arbitrary permutation (including 1-to-many) of the
ingress Time slots within each Space row.
SBS 0
SBS 1
SBS 2
SBS 3
NSE
Egress SBSs
SBS 0
SBS 1
SBS 2
SBS 3
SBS Telecom Standard Product Data Sheet
Preliminary
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