M12L16161A-4.3T ETC, M12L16161A-4.3T Datasheet - Page 22

• Manufacturer Part Number: M12L16161A-4.3T
• Description: 512K x 16Bit x 2Banks Synchronous DRAM
• Manufacturer: ETC

Write Interrupted by Precharge Command & Write Burst stop Cycle @ Burst Length =Full page
*Note:
Elite Semiconductor Memory Technology Inc.
A 1 0 / A P
C L O C K
A D D R
R A S
C A S
C K E
D Q
W E
D Q M
C S
B A
2.Data-in at the cycle of interrupted by precharge can not be written into the corresponding memory cell. It is defined
3.Burst stop is valid at every burst length.
1. Burst can’t end in full page mode, so auto precharge can’t issue.
by AC parameter of
DQM at write interrupted by precharge command is needed to prevent invalid write.
Input data after Row precharge cycle will be masked internally.
R o w A c t i v e
0
( A - B a n k )
R A a
R A a
1
2
3
( A - B a n k )
W r i t e
t
D A a 0 D A a 1
C A a
RDL
4
.
5
D A a 2 D A a 3 D A a 4
6
7
B u r s t S t o p
8
t
9
B D L
H I G H
P.22
10
( A - B a n k )
W r i t e
D A b 0
C A b
11
D A b 1
12
D A b 2
13
D A b 3 D A b 4 D A b 5
14
Publication Date : Jan. 2000
15
16
M12L16161A
* N o t e 2
17
P r e c h a r g e
Revision : 1.3u
( A - B a n k )
18
t
R D L
: D o n ' t C a r e
19