EM78451AP EMC [ELAN Microelectronics Corp], EM78451AP Datasheet - Page 36

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EM78451AP

Manufacturer Part Number
EM78451AP
Description
8-Bit Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
EM78451
8-Bit Microcontroller
2
32 •
NOTE: Vdd = 5V, set up time period = 16.2ms ± 5%
4.7 RESET and Wake-up
W DTE
Vdd = 3V, set up time period = 18.0ms ± 5%
on Reset
Detector
Voltage
Pow er-
A RESET is initiated by:
(1) Power on reset, or
(2) WDT timeout. (if enabled)
The POR voltage of EM78451 ranges between 1.2V~1.8V. Under customer
application, when power is OFF, Vdd must drop below 1.2V and remains OFF for 10us
before power can be switched ON again. This way, the EM78451 will reset and work
normally. The extra external reset circuit will work well if Vdd can rise at a very fast
speed (50 ms or less). However, under most cases where critical applications are
involved, extra devices are required to assist in solving the power-up problems.
The device is kept in a RESET condition for a period of approximately 18ms2 (one
oscillator start-up timer period) after the reset is detected. Fig.16 shows the block
diagram of reset. Once the RESET occurs, the following functions are performed:
The oscillator is running or it will be started.
The Program Counter (R2) is set to all "1".
When power is switched on, bits 5~6 of R3 and the upper 2 bits of R4 are cleared.
All I/O port pins are configured as input mode (high-impedance state).
The Watchdog timer and prescaler are cleared.
The Watchdog timer is enabled if Code Option bit ENWDT is "1".
The CONT register is set to all "1" except bit 6 (INT flag).
Oscillator
W DT
Fig. 16 Block Diagram of Reset
W DT tim eout
VDD
(This specification is subject to change without further notice)
D
CLK
CLR
Q
Product Specification (V1.2) 05.27.2004
Setup
Tim e
Reset
CLK

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