K7R321884M-FC16 SAMSUNG [Samsung semiconductor], K7R321884M-FC16 Datasheet - Page 7
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K7R321884M-FC16
Manufacturer Part Number
K7R321884M-FC16
Description
1Mx36 & 2Mx18 QDRTM II b4 SRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.K7R321884M-FC16.pdf
(18 pages)
K7R321884M
K7R323684M
Notes : 1. Internal burst counter is fixed as 2-bit linear, i.e. when first address is A0+0, next internal burst address is A0+1.
READ
D count=2
2. "READ" refers to read active status with R=Low, "READ" refers to read inactive status with R=high. "WRITE" and "WRITE" are the same case.
3. Read and write state machine can be active simulateneously.
4. State machine control timing sequence is controlled by K.
READ
D count=1
ALWAYS
D count=D count+1
READ ADDRESS
READ ADDRESS
INCREMENT
READ NOP
LOAD NEW
DDR READ
D count=0
READ
READ
D count=2
ALWAYS
STATE DIAGRAM
READ
POWER-UP
- 7 -
1Mx36 & 2Mx18 QDR
WRITE
WRITE
D count=2
ALWAYS
WRITE
D count=D count+1
WRITE ADDRESS
WRITE ADDRESS
INCREMENT
WRITE NOP
DDR WRITE
LOAD NEW
D count=0
WRITE
D count=1
ALWAYS
TM
II b4 SRAM
WRITE
D count=2
Dec. 2003
Rev 2.0