K7R321884M-FC16 SAMSUNG [Samsung semiconductor], K7R321884M-FC16 Datasheet - Page 13
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K7R321884M-FC16
Manufacturer Part Number
K7R321884M-FC16
Description
1Mx36 & 2Mx18 QDRTM II b4 SRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.K7R321884M-FC16.pdf
(18 pages)
K7R321884M
TIMING WAVE FORMS OF READ AND NOP
K7R323684M
K
K
SA
R
Q
(Data Out)
C
C
CQ
CQ
Note : 1. Q1-1 refers to output from address A1+0, Q1-2 refers to output from address A1+1 i.e. the next internal burst address following A1+0.
TIMING WAVE FORMS OF WRITE AND NOP
Note: 1. D1-1 refers to input to address A1+0, D1-2 refers to input to address A1+1, i.e the next internal burst address following A1+0.
K
K
SA
W
D(Data In)
2. Outputs are disabled one cycle after a NOP.
t
IVKH
2. BWx ( NWx ) assumed active.
A1
READ
t
KHIX
t
KHKL
t
KHKL
t
t
KHKH
IVKH
t
KHKH
A1
t
WRITE
KLKH
t
KHIX
t
t
KLKH
KHKL
t
KHKH
t
KH K H
t
t
K H KH
KLKH
t
KHCH
D1-1
t
CHQX
t
t
C H Q V
CHCQV
t
t
A V K H
KH K H
1
t
C H C Q X
A2
Q1-1
t
C QHQV
READ
D1-2
t
KHAX
t
CHQV
t
AVKH
Q1-2
D1-3
t
A2
CHQX
- 13 -
t
WRITE
C Q H Q X
t
t
K H A X
KHIX
1Mx36 & 2Mx18 QDR
Q1-3
D1-4
t
CHCQV
t
CHCQX
t
Q1-4
DVKH
D2-1
Q2-1
NOP
D2-2
t
KHDX
Q2-2
D2-3
Don t Care
NOP
TM
Don t Care
II b4 SRAM
Q2-3
NOP
D2-4
t
CHQZ
Undefined
Dec. 2003
Q2-4
Rev 2.0
Undefined
NOP