X24645F ICMIC [IC MICROSYSTEMS], X24645F Datasheet - Page 3

• Manufacturer Part Number: X24645F
• Description: Advanced 2-Wire Serial E2PROM with Block LockTM Protection
• Manufacturer: ICMIC [IC MICROSYSTEMS]

X24645
DEVICE OPERATION
The X24645 supports a bidirectional bus oriented pro-
tocol. The protocol defines any device that sends data
onto the bus as a transmitter, and the receiving device as
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave.
The master will always initiate data transfers, and provide
the clock for both transmit and receive operations.
Therefore, the X24645 will be considered a slave in all
applications.
Figure 1. Data Validity
Notes: (5) Typical values are for T
Figure 2. Definition of Start and Stop
(6) t
device requires to perform the internal write operation.
WR
is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
SDA
SCL
SDA
SCL
A
= 25°C and nominal supply voltage (5V)
START BIT
DATA STABLE
CHANGE
DATA
3
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW. SDA state changes during SCL HIGH are
reserved for indicating start and stop conditions. Refer to
Figures 1 and 2.
Start Condition
All command are preceded by the start condition, which
is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24645 continuously monitors the SDA and SCL
lines for the start condition and will not respond to
any command until this condition has been met.
STOP BIT
2783 ILL F04
2783 ILL F05