X24645F ICMIC [IC MICROSYSTEMS], X24645F Datasheet - Page 13

• Manufacturer Part Number: X24645F
• Description: Advanced 2-Wire Serial E2PROM with Block LockTM Protection
• Manufacturer: ICMIC [IC MICROSYSTEMS]

X24645
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
erase/program cycle. During the write cycle, the
Bus Timing
Notes: (5)Typical values are for T
Guidelines for Calculating Typical Values of
Bus Pull-Up Resistors
Bus Timing
Write Cycle Limits
SDA OUT
SDA IN
SDA
SCL
Symbol
(6)t
T
SCL
WR
WR
time the device requires to automatically complete the internal write operation.
120
100
(6)
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
40
20
80
60
0
0
t
SU:STA
MIN.
RESISTANCE
BUS CAPACITANCE (pF)
20
R
R
MAX.
RESISTANCE
MIN
MAX
WORD n
40
8th BIT
=
=
Write Cycle Time
V
I
A
C
OL MIN
CC MAX
60
BUS
t
= 25°C and nominal supply voltage (5V).
R
Parameter
80100120
=1.8KΟ
t
HD:STA
ACK
t
F
t
AA
2783 ILL F19
t
HD:DAT
t
HIGH
CONDITION
Min.
STOP
13
t
LOW
X24645 bus interface circuits are disabled, SDA is
allowed to remain HIGH, and the device does not
respond to its slave address.
SYMBOL TABLE
t
DH
t
SU:DAT
t
Typ.
WR
WAVEFORM
5
(5)
CONDITION
START
INPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
Max.
10
t
R
t
SU:STO
t
BUF
OUTPUTS
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
2783 ILL F18
2783 ILL F17
Units
ms
2783 FRM T11