H5PS5162FFR-C HYNIX [Hynix Semiconductor], H5PS5162FFR-C Datasheet - Page 10

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H5PS5162FFR-C

Manufacturer Part Number
H5PS5162FFR-C
Description
512Mb DDR2 SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
Rev. 1.0 / July. 2008
3.2 DC & AC Logic Input Levels
3.2.1 Input DC Logic Level
3.2.2 Input AC Logic Level
3.2.3 AC Input Test Conditions
Note:
1. Input waveform timing is referenced to the input signal crossing through the V
2. The input signal minimum slew rate is to be maintained over the range from V
3. AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions
Symbol
V
V
V
under test.
edges and the range from V
and VIH(ac) to VIL(ac) on the negative transitions.
IH
IL
SWING(MAX)
Symbol
Symbol
V
V
SLEW
(ac)
(ac)
V
V
IH
IL
REF
SWING(MAX)
Falling Slew =
(dc)
(dc)
ac input logic high
ac input logic low
Parameter
delta TF
Input signal maximum peak to peak swing
dc input logic high
dc input logic low
V
REF
Input signal minimum slew rate
Parameter
REF
< Figure : AC Input Test Signal Waveform>
delta TF
- V
Input reference voltage
to V
IL(ac)
VREF +
IL(ac)
Condition
0.250
Min.
max
-
DDR2 400,533
max for falling edges as shown in the below figure.
VREF - 0.250
VREF + 0.125
Max.
-
Min.
- 0.3
delta TR
Rising Slew =
VREF +
0.200
Min.
-
VREF - 0.125
DDR2 667,800
VDDQ + 0.3
0.5 * V
Max.
Value
1.0
1.0
VREF - 0.200
REF
REF
DDQ
to V
V
Max.
level applied to the device
H5PS5162FFR series
IH(ac)
-
IH(ac)
delta TR
min - V
min for rising
Units
Units
V/ns
V
V
V
V
V
V
V
V
V
V
V
DDQ
Units
REF
IH(ac)
IH(dc)
IL(dc)
IL(ac)
SS
V
V
REF
max
max
min
min
Release
Notes
Notes
Notes
2, 3
1
1
10

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