H57V2582GTR-60J HYNIX [Hynix Semiconductor], H57V2582GTR-60J Datasheet - Page 14
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H57V2582GTR-60J
Manufacturer Part Number
H57V2582GTR-60J
Description
256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
1.H57V2582GTR-60J.pdf
(22 pages)
COMMAND TRUTH TABLE
Note : 1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high.
Rev 1.0 / Aug. 2009
Mode Register Set
No Operation
Device Deselect
Bank Active
Read
Read with Autoprecharge
Write
Write with Autoprecharge
Precharge All Banks
Precharge selected Bank
Burst stop
DQM
Auto Refresh
Burst-Read Single-Write
Self Refresh Entry
Self Refresh Exit
Precharge Power Down
Entry
Precharge Power Down Exit
Clock Suspend Entry
Clock Suspend Exit
Function
CKEn-1
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
CKEn
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
CS
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS
H
H
H
H
H
H
H
H
H
X
X
X
X
X
V
L
L
L
L
L
L
L
X
X
CAS
H
H
H
H
H
H
L
X
L
L
L
L
L
L
L
X
X
X
X
V
H
H
Synchronous DRAM Memory 256Mbit
WE
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
V
L
L
L
L
L
L
DQM
X
X
X
X
X
X
X
X
X
X
V
X
X
X
X
X
X
X
X
H57V2582GTR-xxI Series
(Other Pins OP code)
ADDR
Row Address
umn
umn
umn
umn
Col-
Col-
Col-
Col-
X
X
A9 Pin High
Op Code
A10
/AP
X
X
X
X
X
X
X
X
X
X
X
H
H
H
L
L
L
BA
V
V
V
V
V
X
V
Note
1
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