K7I163682B_06 SAMSUNG [Samsung semiconductor], K7I163682B_06 Datasheet - Page 8

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K7I163682B_06

Manufacturer Part Number
K7I163682B_06
Description
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
K7I163682B
K7I161882B
Notes: 1. Internal burst counter is fixed as 2-bit linear, i.e. when first address is A0+0, next internal burst address is A0+1.
LINEAR BURST SEQUENCE TABLE
2. "LOAD" refers to read new address active status with LD=Low, "LOAD" refers to read new address inactive status with LD=High.
3. "READ" refers to read active read status with R/W=High, "WRITE" refers to write active status with R/W=Low
LOAD
BURST SEQUENCE
Second Address
First Address
LOAD
DDR READ
READ
STATE DIAGRAM
LOAD NEW ADDRESS
POWER-UP
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
NOP
- 8 -
LOAD
Case 1
LOAD
SA
0
1
0
WRITE
DDR WRITE
LOAD
Rev. 5.0 July 2006
Case 2
SA
1
0
LOAD
0

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