S5935TFC AMCC [Applied Micro Circuits Corporation], S5935TFC Datasheet - Page 107

• Manufacturer Part Number: S5935TFC
• Description: PCI Product
• Manufacturer: AMCC [Applied Micro Circuits Corporation]

S5935 – PCI Product
Master Abort
PCI accesses to nonexistent or disabled targets never
observe DEVSEL# being asserted. In this situation, it
is necessary for the initiator to abort the transaction
(master abort). As an initiator, S5935 waits for six
clock periods after asserting FRAME# to determine
whether a master abort is required. These six clock
periods allow slow targets, which may require several
bus clocks before being able to assert DEVSEL#, to
respond. It is also possible a PCI bridge device is
present which employs “subtractive” decoding. A
device which does a subtractive decode asserts
DEVSEL#, claiming the cycle, when it sees that no
other device has asserted it three clocks after the
address phase.
Figure 54. Master Abort, No Response
AMCC Confidential and Proprietary
PCI CLOCK
FRAME #
IRDY#
TRDY#
DEVSEL#
(T)
(T)
(I)
(I)
1
2
DEVICE
FAST
3
MEDIUM
DEVICE
4
If DEVSEL# is not asserted, the S5935 deasserts
FRAME# (if asserted) upon the sixth clock period (Fig-
ure 9). IRDY# is deasserted by the S5935 during the
next clock. The occurrence of a master abort causes
the S5935 to set bit 13 (Master Abort) of the PCI Sta-
tus Register, indicating an error condition.
Target-Initiated Termination
There are situations where the target may end a trans-
fer prematurely. This is called “target-initiated
termination.” Target terminations fall into three catego-
ries: disconnect, retry, and target abort. Only the
disconnect termination completes a data transfer.
DEVICE
SLOW
5
(SUBTRACTIVE
DECODE)
BRIDGE
DEVICE
67
Revision 1.02 – June 27, 2006
(I) = DRIVEN BY INITIATOR
(T) = DRIVEN BY TARGET
Data Book
DS1527
8
107