LH540203D SHARP [Sharp Electrionic Components], LH540203D Datasheet - Page 4

• Manufacturer Part Number: LH540203D
• Description: CMOS 2048X9 ASYNCHRONOUS FIFO
• Manufacturer: SHARP [Sharp Electrionic Components]

LH540203
OPERATIONAL DESCRIPTION (cont’d)
Retransmit
by means of the Retransmit function. A retransmit opera-
tion is initiated by pulsing the RT input LOW. Both R and
W must be deasserted (HIGH) for the duration of the
retransmit pulse. The FIFO’s internal read-address
pointer is reset to point to location zero, the first physical
memory location, while the internal write-address
pointer remains unchanged.
region in between the read-address pointer and the
write-address pointer may be reaccessed by subsequent
read operations. A retransmit operation may affect the
state of the status flags FF, HF, and EF, depending on
the relocation of the read-address pointer. There is no
restriction on the number of times that a block of data
within an LH540203 may be read out, by repeating the
retransmit operation and the subsequent read operations.
retransmitted is 2048 words. Note that if the write-address
pointer ever ‘wraps around’ (i.e., passes location zero
more than once) during a sequence of retransmit opera-
tions, some data words will be lost.
LH540203 is operating in depth-cascaded mode,
because the FL/RT control pin must be used for first-load
selection rather than for retransmission control.
NOTES:
1. A reset operation forces XO HIGH for the n
2. The terms ‘master’ and ‘slave’ refer to operation in depth-cas-
3. H = HIGH; L = LOW; X = Don’t Care.
4
H
H
L
XI
The FIFO can be made to reread previously-read data
After a retransmit operation, those data words in the
The maximum length of a data block which may be
The Retransmit function is not available when the
XI HIGH for the (n+1)
caded grouping mode.
1
1
Table 1. Grouping-Mode Determination
FL/
RT
H
X
L
During a Reset Operation
Cascaded
Slave
Cascaded
Master
Standalone
MODE
2
st
2
FIFO.
USAGE
XO/HF
XO
XO
HF
th
FIFO, thus forcing
USAGE
(none)
XI
XI
XI
USAGE
FL/RT
RT
FL
FL
I/O
O
I
I
NUMBER OF UNREAD DATA
WORDS PRESENT WITHIN
Table 2. Expansion-Pin Usage According to
XI
XO/HF
FL/RT
1025 to 2047
2048
PIN
1 to 1024
2048
0
9 FIFO
Table 3. Status Flags
CMOS 2048
STANDALONE
Grounded
Becomes
HF
Becomes
RT
Grouping Mode
CASCADED
From XO
(n-1st
FIFO)
To XI
(n+1st
FIFO)
Grounded
(Logic
LOW)
9 Asynchronous FIFO
MASTER
FF
H
H
H
L
HF
H
H
L
L
CASCADED
From XO
(n-1st
FIFO)
To XI
(n+1st
FIFO)
Logic
HIGH
SLAVE
EF
H
H
H
L