W6691CD WINBOND [Winbond], W6691CD Datasheet - Page 84
W6691CD
Manufacturer Part Number
W6691CD
Description
ISDN S/T Interface Transceiver
Manufacturer
WINBOND [Winbond]
Datasheet
1.W6691CD.pdf
(106 pages)
- Current page: 84 of 106
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B1SW1 / B1SW0
These two bits determine B1 channel switch among PCM port , GCI and Layer2.
00: Select B1 channel switch between Layer2 and Layer1/GCI.
01: Select B1 channel switch between Layer1/GCI and PCM.
10: Select B1 channel switch between PCM and Layer2.
8.9.6 ACTL1
Value after reset : 00H
SRST Software Reset
When this bit is set to "1" 1ms at least, a software reset signal is activated. The effect of the reset signal is
same as the hardware reset.
This bit is not auto-clear, the software must write "0" to this bit to exit from the reset mode.
Note: When SRST = 1, the chip is in reset state. Read or write to any of the registers is inhibited at this
moment.
PD
After hardware reset or software rest, PD bit is set to “0”. It means W6691system clock is powered up after
reset.
0: Power Down Disable. W6691 system clock is not allowed to be powered down.
1: Power Down Enable. If S interface can not receive non info 0 signal from line, W6691 enter power down
mode automatically.
7
0
Auxiliary Control Register 1
6
0
B1 channel Switch
Power Down
SRST
5
4
0
84
3
0
Read/Write
PD
2
Address 3DH
Preliminary W6691
OPS1
Publication Release Date: Sep 2001
1
OPS0
0
Revision 1.1
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