W6691CD WINBOND [Winbond], W6691CD Datasheet - Page 46
W6691CD
Manufacturer Part Number
W6691CD
Description
ISDN S/T Interface Transceiver
Manufacturer
WINBOND [Winbond]
Datasheet
1.W6691CD.pdf
(106 pages)
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acknowledge the interrupt. The microprocessor must handle the interrupt before more than 32 bytes of data
are received. This corresponds to a maximum microprocessor reaction time of 16 ms at 16 kbps data rate.
overflow" interrupt and status bit.
7.5.3 Transmission of Frames in D Channel
D_XFR interrupt), the micro-processor can write up to 32 bytes of data into the FIFO and use the XMS
command bit to start frame transmission. The HDLC transmitter sends the opening flag first and then sends
the data in the transmit FIFO.
interrupt to request another block of data. The microprocessor can then write further data to the transmit FIFO
and enables the subsequent transmission by issuing an XMS command.
Message End) and XMS command bits to finish the frame transmission. The transmitter then transmits the
data in the FIFO and appends CRC and closing flag.
condition will occur. The W6691 will automatically reset the transmitter and send inter frame time fill pattern (all
1's) on D channel. The microprocessor is informed about this condition via an XDUN (Transmit Data
Underrun) interrupt in D_EXIR register. The microprocessor must wait until transmit FIFO ready (via XFR
interrupt), re-write data, and issue XMS command to re-transmit the data.
XRST command resets the transmitter and causes a transmit FIFO ready condition.
indicated by an D_XFR interrupt.
If the microprocessor is late in handling the interrupt, the incoming additional bytes will result in a "data
A 64-byte FIFO is provided in the transmit direction. If the transmit FIFO is ready (which is indicated by a
The microprocessor must write the address, control and information field of a frame into the transmit FIFO.
Every time no more than 32 bytes of data are left in the transmit FIFO, the transmitter generates a D_XFR
If the data written to the FIFO is the last segment of a frame, the microprocessor issues the XME (Transmit
If the microprocessor fails to respond the D_XFR interrupt within a given time (16 ms), a data underrun
It is possible to abort a frame by issuing a D_CMDR:XRST (D channel Transmitter Reset) command. The
After the microprocessor has issued the XME command, the successful termination of transmission is
46
Preliminary W6691
Publication Release Date: Sep 2001
Revision 1.1
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