ISL6610 INTERSIL [Intersil Corporation], ISL6610 Datasheet - Page 9

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ISL6610

Manufacturer Part Number
ISL6610
Description
Dual Synchronous Rectified MOSFET Drivers
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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Therefore, if such a situation (when input bus powered up
before the bias of the controller and driver is ready) could
conceivably be encountered, it is a common practice to
place a resistor (R
upper MOSFET to suppress the Miller coupling effect. The
value of the resistor depends mainly on the input voltage’s
rate of rise, the C
threshold of the upper MOSFET. A higher dV/dt, a lower
C
FET will require a smaller resistor to diminish the effect of
the internal capacitive coupling. For most applications, the
integrated 20kΩ typically sufficient, not affecting normal
performance and efficiency.
The coupling effect can be roughly estimated with the
following equations, which assume a fixed linear input ramp
and neglect the clamping effect of the body diode of the
upper drive and the bootstrap capacitor. Other parasitic
components such as lead inductances and PCB
capacitances are also not taken into account. These
equations are provided for guidance purpose only.
Therefore, the actual coupling effect should be examined
using a very high impedance (10MΩ or greater) probe to
ensure a safe design margin.
DS
/C
GS
ratio, and a lower gate-source threshold upper
GD
UGPH
/C
GS
) across the gate and source of the
ratio, as well as the gate-source
9
ISL6610, ISL6610A
V
R
GS_MILLER
FIGURE 6. GATE TO SOURCE RESISTOR TO REDUCE
=
VCC
R
UGPH
UPPER MOSFET MILLER COUPLING
=
+
DU
DL
R
dV
------- R C
dt
GI
C
PHASE
BOOT
rss
UGATE
rss
C
BOOT
1 e
=
C
--------------------------------- -
dV
------ - R C
GD
dt
G
V
DS
R
C
GI
GD
iss
C
C
iss
GS
S
=
November 22, 2006
VIN
C
Q
GD
UPPER
D
(EQ. 5)
+
FN6395.0
C
C
DS
GS

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