PSD913G2 STMICROELECTRONICS [STMicroelectronics], PSD913G2 Datasheet - Page 30

• Manufacturer Part Number: PSD913G2
• Description: Configurable Memory System on a Chip for 8-Bit Microcontrollers
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

PSD935G2
The
PSD935G2
Functional
Blocks
(cont.)
9.1.3.2 Configuration Modes for MCUs with Separate Program and Data Spaces
9.1.3.2.1 Separate Space Modes
Code memory space is separated from data memory space. For example, the PSEN
signal is used to access the program code from the main Flash Memory, while the RD
signal is used to access data from the secondary Flash memory, SRAM and I/O Ports.
This configuration requires the VM register to be set to 0Ch.
9.1.3.2.2 . Combined Space Modes
The program and data memory spaces are combined into one space that allows the main
Flash Memory, secondary Flash memory, and SRAM to be accessed by either PSEN or
RD. For example, to configure the main Flash memory in combined space mode, bits 2
and 4 of the VM register are set to “1”.
9.1.3.3 80C51XA Memory Map Example
See Application Notes for examples.
Figure 7. 80C51XA Memory Modes – Separate Space Mode
Figure 8. 80C51XA Memory Mode – Combined Space Mode
RD
VM REG BIT 3
VM REG BIT 4
PSEN
VM REG BIT 1
VM REG BIT 2
VM REG BIT 0
DPLD
RD
RS0
CSBOOT0-3
FS0-7
PSEN
DPLD
RS0
CSBOOT0-3
FS0-7
CS
FLASH
MAIN
OE
CS
FLASH
MAIN
OE
CS
BLOCK
FLASH
BOOT
OE
PSD9XX Family
RD
CS
BLOCK
FLASH
BOOT
OE
CS
SRAM
OE
CS
SRAM
OE
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