PPC405GP-3BE133C AMCC [Applied Micro Circuits Corporation], PPC405GP-3BE133C Datasheet - Page 52

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PPC405GP-3BE133C

Manufacturer Part Number
PPC405GP-3BE133C
Description
Power PC 405GP Embedded Processor
Manufacturer
AMCC [Applied Micro Circuits Corporation]
Datasheet
405GP – Power PC 405GP Embedded Processor
I/O Specifications—All speeds
Notes:
1. PCI timings are for operation up to 66.66MHz. PCI output hold time requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.
2. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
3. For PCI, I/O H is specified at 0.9OV
52
Internal Peripheral Interface
IICSCL
IICSDA
UART0_CTS
UART0_DCD
UART0_DSR
UART0_DTR
UART0_RI
UART0_RTS
UART0_Rx
UART0_Tx
UART1_RTS/
UART1_DTR
UART1_DSR/
UART1_CTS
UART1_Rx
UART1_Tx
UARTSerClk
Interrupts Interface
IRQ0:6[GPIO17:23]
JTAG Interface
TCK
TDI
TDO
TMS
TRST
System Interface
DrvrInh1:2
GPIO1[TS1E]
GPIO2[TS2E]
GPIO3[TS1O]
GPIO4[TS2O]
GPIO5[TS3]
GPIO6[TS4]
GPIO7[TS5]
GPIO8[TS6]
GPIO9[TrcClk]
Halt
RcvrInh
SysClk
SysErr
SysReset
TestEn
TmrClk
In synchronous mode, timing is relative to SysClk. In asynchronous mode, timing is relative to PCIClk.
and I/O L is specified at 0.4 V.
Signal
Setup Time
(T
IS
na
na
na
na
na
na
na
na
na
na
dc
dc
dc
dc
dc
min)
Input (ns)
Hold Time
(T
DD
IH
na
na
na
na
na
na
na
na
na
na
dc
dc
dc
dc
dc
and I/O L is specified at 0.1OV
min)
(Part 2 of 2)
Valid Delay
(T
OV
na
na
na
na
na
na
na
na
na
na
na
10
na
na
max)
Output (ns)
Hold Time
(T
OH
na
na
na
na
na
na
na
na
na
na
na
na
na
1
min)
DD
. For all other interfaces, I/O H is specified at 2.4 V
Output Current (mA)
(min)
I/O H
19
19
12
12
12
12
12
12
12
12
12
na
na
12
na
12
na
na
12
na
na
na
12
na
na
na
12
12
na
na
Revision 2.03 – September 7, 2007
(min)
I/O L
12
12
na
na
na
na
na
na
na
na
na
na
na
na
na
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Data Sheet
Clock
Notes
async
async
async
async
async
async
async
async
async
async
AMCC

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