PSD913F1 STMICROELECTRONICS [STMicroelectronics], PSD913F1 Datasheet - Page 74

• Manufacturer Part Number: PSD913F1
• Description: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Microcontroller Interface – PSD9XX AC/DC Parameters
(5V ± 10% Versions)
V
PSD9XX Family
Reset Pin Timing
70
Power Down Timing
NOTE: 1. Vstbyon is measured at V
NOTE: 1. RESET will not reset Flash programming/erase cycles.
NOTE: 1. t
stbyon
Symbol
t
t
Symbol
t
t
t
t
Symbol
t
t
BVBH
BXBL
NLNH
OPR
NLNH-PO
NLNH-A
LVDV
CLWH
2. RESET will abort Flash programming or erase cycle. For PSD934F2 and PSD954F2 only.
Timing
CLCL
Vstby Detection to Vstbyon Output High
V stby Off Detection to V stbyon
Output Low
is the CLKIN clock period.
Warm RESET Active Low Time (Note 1)
RESET High to Operational Device
Power On Reset Active Low Time
Warm Reset, will abort and reset Flash
programming/erase cycles to Read mode.
(Note 2)
ALE Access Time from
Power Down
Maximum Delay from APD
Enable to Internal PDN
Valid Signal
(5 V ± 10%)
Parameter
Parameter
(5 V ± 10%)
Parameter
(5 V ± 10%)
CC
ramp rate of 2 ms.
CLKIN Input
Conditions
Using
Conditions
(Note 1)
(Note 1)
Conditions
Min
-70
Max
80
Min
Min
Min
150
15
25
1
-90
*
t
CLCL
Max
90
Typ
Typ
20
20
(µs) (Note 1)
Preliminary Information
Min
-15
Max
Max
120
Max
150
Unit
Unit
Unit
ms
µs
µs
µs
ns
ns
ns
µs