PSD913F1 STMICROELECTRONICS [STMicroelectronics], PSD913F1 Datasheet - Page 18

• Manufacturer Part Number: PSD913F1
• Description: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

8.0
PSD9XX
Register
Description
and Address
Offset
14
PSD9XX Family
Table 7 shows the offset addresses to the PSD9XX registers relative to the CSIOP base
address. The CSIOP space is the 256 bytes of address that is allocated by the user to the
internal PSD9XX registers. Table 7 provides brief descriptions of the registers in CSIOP
space. For a more detailed description, refer to section 9.
*
Table 7. Register Address Offset
Other registers that are not part of the I/O ports.
Data In
Control
Data Out
Direction
Drive Select
Flash Protection
Secondary Flash
Protection
PMMR0
PMMR2
Page
VM
Register Name
Port A Port B Port C Port D Other*
00
02
04
06
08
01
03
05
07
09
10
12
14
16
11
13
15
17
C0
C2
E0
E2
B0
B4
Reads Port pin as input,
MCU I/O input mode
Selects mode between
MCU I/O or Address Out
Stores data for output
to Port pins, MCU I/O
output mode
Configures Port pin as
input or output
Configures Port pins as
either CMOS or Open
Drain on some pins, while
selecting high slew rate
on other pins.
Read only – Flash Sector
Read only – PSD Security
Power Management
Register 0
Power Management
Register 2
Page Register
Places PSD memory
areas in Program and/or
Data space on an
individual basis.
Protection
and Secondary Flash
Sector Protection
Preliminary Information
Description