HFDOM44KR016 HANBIT [Hanbit Electronics Co.,Ltd], HFDOM44KR016 Datasheet - Page 9

• Manufacturer Part Number: HFDOM44KR016
• Description: 40Pin Flash Disk Module Min.8MB ~ Max.1GB, True IDE Interface Mode, 3.3V / 5.0V Operating
• Manufacturer: HANBIT [Hanbit Electronics Co.,Ltd]

HANBit
REGISTERS
URL:www.hbe.co.kr
Rev. 1.0 (December, 2004)
2 Host Read/Write timing
3 Flash Read/Write timing
1) Data Register (Address – 1F0h[170h];Offset 0,8,9)
The Data Register is a 16-bit register, and it is used to transfer data blocks between the
CompactFlash Storage Card data buffer and the Host. This register overlaps the Error Register.The table below
describes the combinations of data register access and is provided to assist in understanding the overlapped Data
Register and Error/Feature Register rather than to attempt to define general PCMCIA word and byte access modes
and operations. See the PCMCIA PC Card Standard Release 2.0 for definitions of the Card Accessing Modes for
I/O and Memory cycles.
Note: Because of the overlapped registers, access to the 1F1h, 171h or offset 1 are not defined for word (-CE2 = 0
and -CE1 = 0) operations. These accesses are treated as accesses to the Word Data
Register. The duplicated registers at offsets 8, 9 and Dh have no restrictions on the operations that
can be performed by the socket.
CE[2:1]
Ts
Th
Th
Sym.
Sym.
Ts
Ts
Th
HIOR#/HOE#
Th
Tc
Td
HA
(FW)
(FW)
(FR)
(FR)
(W)
(W)
(R)
(F)
HIOW#/
HWE#
HD bus asserted from HIOR# / HOE#
HD hold time after HIOR# / HOE#
HD set up time of HIOW# / HWE#
HD hold time of HIOW# / HWE#
Flash Read / Write cycle time
FD set up time of FWE#
FD hold time of FWE#
FD set up time of FRD#
FD hold time of FRD#
Description
Description
Td
HA Valid
Read HD Valid
Ts
9 / 30
(W)
HD write
Min.
Min.
40
10
80
40
10
5
5
Typ.
Typ.
100
Th
Th
Max.
Max.
HFDOM44KRxxx
10
70
HANBit Electronics Co., Ltd.
(R)
(W)
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns