GS882Z18AB GSI [GSI Technology], GS882Z18AB Datasheet - Page 6

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GS882Z18AB

Manufacturer Part Number
GS882Z18AB
Description
9Mb Pipelined and Flow Through Synchronous NBT SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
GS882Z18/36A BGA Pin Description
Rev: 1.04 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
B
A
Symbol
, B
A
V
MCH
TMS
TDO
DNU
DQ
DQ
DQ
DQ
CKE
ADV
LBO
TCK
V
V
B
TDI
NC
CK
ZQ
0
An
ZZ
PE
E
E
E
FT
DDQ
W
G
, B
, A
DD
SS
1
3
2
C
D
A
B
1
C
, B
D
Type
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
FLXDrive Output Impedance Control (Low = Low Impedance [High Drive], High = High Impedance [Low
Byte Write Enable for DQ
6/35
Address field LSBs and Address Counter Preset Inputs
Burst address counter advance enable; active high
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Sleep mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
9th Bit Enable; active low
Clock Enable; active low
Write Enable; active low
Chip Enable; active high
Chip Enable; active low
Chip Enable; active low
Scan Test Mode Select
GS882Z18/36AB/D-250/225/200/166/150/133
I/O and Core Ground
Scan Test Data Out
Must Connect High
Core power supply
Scan Test Data In
Scan Test Clock
Address Inputs
Description
No Connect
Do Not Use
A
, DQ
Drive])
B
, DQ
C
, DQ
D
I/Os; active low
© 2001, GSI Technology

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