GS881Z18AT GSI [GSI Technology], GS881Z18AT Datasheet - Page 22

• Manufacturer Part Number: GS881Z18AT
• Description: 9Mb Pipelined and Flow Through Synchronous NBT SRAM
• Manufacturer: GSI [GSI Technology]

Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
TDI
TMS
TCK
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·
·
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Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
2
31 30 29
0
JTAG TAP Block Diagram
Boundary Scan Register
·
1
0
Control Signals
22/31
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·
· · ·
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2
1
0
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GS881Z18/36AT-250/225/200/166/150/133
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TDO
© 2001, GSI Technology